Unit 5 - Practice Quiz

ECE213 50 Questions
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1 What is the primary definition of a digital register?

A. A combinational circuit that performs arithmetic operations
B. A group of flip-flops used to store binary information
C. A circuit that converts analog signals to digital
D. A device that generates clock pulses

2 How many flip-flops are required to construct an -bit register?

A.
B.
C.
D.

3 In a Serial-In Serial-Out (SISO) shift register with flip-flops, how many clock pulses are required to shift an -bit number completely into the register?

A.
B.
C.
D.

4 Which type of shift register allows data to be entered all at once and read out all at once?

A. Serial-In Serial-Out (SISO)
B. Serial-In Parallel-Out (SIPO)
C. Parallel-In Serial-Out (PISO)
D. Parallel-In Parallel-Out (PIPO)

5 What is the primary disadvantage of an Asynchronous (Ripple) counter compared to a Synchronous counter?

A. It requires more power
B. It is difficult to design
C. It suffers from propagation delay accumulation
D. It cannot count downwards

6 In a 4-bit Johnson Ring Counter, how many distinct states are there?

A. 4
B. 8
C. 16
D. 32

7 What is the modulus (MOD number) of a standard -bit Ring Counter?

A.
B.
C.
D.

8 Which component is strictly necessary to create a Universal Shift Register?

A. Decoders
B. Multiplexers (MUX)
C. Comparators
D. Analog-to-Digital Converters

9 If the input frequency to a MOD-16 counter is 16 kHz, what is the output frequency?

A. 1 kHz
B. 16 kHz
C. 256 kHz
D. 32 kHz

10 In a Synchronous counter, how is the clock signal applied?

A. To the first flip-flop only
B. To the last flip-flop only
C. Simultaneously to all flip-flops
D. Cascaded from one flip-flop to the next

11 For a JK flip-flop to operate in 'toggle' mode within a counter, what must the inputs be?

A.
B.
C.
D.

12 Which of the following is an application of a Serial-In Parallel-Out (SIPO) shift register?

A. Parallel data transmission
B. Serial-to-Parallel data conversion
C. Voltage regulation
D. Analog signal filtering

13 To design a MOD-10 (Decade) asynchronous counter using JK flip-flops, which gate is used to reset the counter?

A. OR gate
B. NAND gate
C. NOT gate
D. XOR gate

14 What happens in a Bidirectional Shift Register when the direction control signal is changed?

A. The data is erased
B. The data bits shift in the opposite direction on the next clock
C. The register stops working
D. The register converts to a counter

15 A 5-bit ripple counter counts from:

A. 0 to 5
B. 0 to 15
C. 0 to 31
D. 0 to 32

16 Which statement best describes a 'Universal Shift Register'?

A. It can only shift data right
B. It can shift left, shift right, and perform parallel loading
C. It is used for universal time keeping
D. It works with any voltage level

17 In a 4-bit Ring Counter initialized with $1000$, what is the state after 2 clock pulses?

A. 1000
B. 0100
C. 0010
D. 0001

18 What is the feedback connection for a Johnson Counter?

A. Output of the last stage to Input of the first stage
B. Output of the last stage to Input of the first stage
C. Output of the first stage to Input of the last stage
D. Output of the first stage to Input of the last stage

19 How many unused states are there in a 4-bit Johnson Counter?

A. 0
B. 4
C. 8
D. 12

20 Shifting a binary number to the left by one position is equivalent to:

A. Addition by 2
B. Subtraction by 2
C. Multiplication by 2
D. Division by 2

21 Which table is used to determine the input logic for the flip-flops when designing a Synchronous Counter?

A. Truth Table
B. Excitation Table
C. Function Table
D. Characteristic Table

22 What is the 'Lock-out' condition in counters?

A. When the counter stops counting
B. When the counter enters an unused state and cannot return to the valid sequence
C. When the clock is disconnected
D. When the counter resets to zero

23 In a 3-bit Asynchronous Down Counter using negative edge-triggered flip-flops, the clock input of a flip-flop is driven by:

A. The output of the previous flip-flop
B. The output of the previous flip-flop
C. The main clock signal
D. The Clear input

24 What is the maximum delay in a 4-bit Asynchronous counter if the propagation delay of one flip-flop is ?

A.
B.
C.
D.

25 Which of the following is NOT a valid mode of operation for the 74194 Universal Shift Register?

A. Hold
B. Shift Left
C. Invert All Bits
D. Parallel Load

26 How many flip-flops are needed to design a MOD-12 counter?

A. 3
B. 4
C. 5
D. 12

27 Which shift register application allows data to be delayed by a specific number of clock cycles?

A. Sequence Generator
B. Serial Adder
C. Time Delay Line
D. Parallel Converter

28 The sequence $000, 001, 011, 111, 110, 100$ represents which type of counter?

A. Binary Up Counter
B. Ring Counter
C. Johnson Counter (3-bit)
D. Ripple Counter

29 For a Synchronous counter, the maximum operating frequency is determined by:

A. The sum of delays of all flip-flops
B. The delay of a single flip-flop plus combinational logic delay
C. The frequency of the input signal
D. The number of inputs

30 What is the state of the 'Clear' (CLR) input usually required to allow a counter to count?

A. Active (asserted)
B. Inactive (de-asserted)
C. Connected to Clock
D. Floating

31 In a 4-bit Ring Counter, if the initial state is $0000$, what will the sequence be?

A. $0000, 0001, 0010, ...$
B. $0000, 0000, 0000, ...$
C. $1111, 1111, 1111, ...$
D. $1000, 0100, 0010, ...$

32 Which logic gate is typically used to decode the output of a Ring Counter?

A. AND gate
B. No decoding logic is required
C. NAND gate
D. OR gate

33 To convert a Serial-In Serial-Out register to a Serial-In Parallel-Out register, one must:

A. Add more flip-flops
B. Change the clock frequency
C. Tap the output of each flip-flop
D. Connect the output to the input

34 What distinguishes a 'Self-Correcting' counter?

A. It runs without a clock
B. It automatically returns to a valid state sequence if it enters an invalid state
C. It corrects errors in the input voltage
D. It uses Error Correcting Code (ECC)

35 In a 4-bit PIPO register using D flip-flops, if the data inputs are $1011$ and a clock edge occurs, what is the output?

A. $0000$
B. $1111$
C. $1011$
D. $0100$

36 The term 'cascading' counters means:

A. Running them in parallel
B. Connecting the output of one counter to the clock input of another
C. Using them as shift registers
D. Applying high voltage

37 A counter composed of T flip-flops will count if the T input is held at logic:

A. 0
B. 1
C. Low
D. High Impedance

38 Which type of register is most suitable for performing arithmetic operations like serial addition?

A. Shift Register
B. Latch
C. Buffer
D. Ripple Counter

39 Why are Ring and Johnson counters often preferred over binary counters for sequencing operations?

A. They use fewer flip-flops
B. They are glitch-free in decoding
C. They count higher numbers
D. They are asynchronous

40 What is the binary representation of the decimal number 10, which triggers the reset in a BCD (Decade) counter?

A. 1001
B. 1010
C. 1100
D. 1110

41 In a 4-bit Bidirectional Shift Register, the mode control inputs are $01$. This usually corresponds to:

A. No change (Hold)
B. Shift Right
C. Shift Left
D. Parallel Load

42 When designing a counter with an arbitrary sequence (e.g., 0, 2, 4, 6...), the states 1, 3, 5, 7 are called:

A. Active states
B. Don't care states
C. Toggle states
D. Buffer states

43 What happens to the data in a SISO register if the clock stops?

A. The data is lost immediately
B. The data is retained as long as power is applied
C. The data resets to all zeros
D. The data becomes inverted

44 Which equation represents the number of flip-flops () needed for a MOD- counter?

A.
B.
C.
D.

45 In a serial transfer of data between two registers A and B, how is the transfer usually accomplished?

A. Output of A connected to Input of B, loops back to A
B. Output of A connected to Input of B
C. Both clocked by different clocks
D. Manual switching

46 A presettable counter is one that:

A. Starts counting from zero only
B. Can be loaded with any starting number
C. Can only count up
D. Does not require a clock

47 What is the primary function of the 'Load' input in a shift register?

A. To shift data right
B. To enable parallel data entry
C. To reset the register
D. To disable the clock

48 Which of the following describes a 'Twisted Ring Counter'?

A. Binary Counter
B. Johnson Counter
C. Ripple Counter
D. Decade Counter

49 If a 4-bit Asynchronous counter is cleared and then receives 20 clock pulses, what is the binary output?

A. 0010
B. 0100
C. 0101
D. 0000

50 What is the characteristic equation for the Next State () of a D flip-flop used in register design?

A.
B.
C.
D.