1What is the primary definition of a digital register?
A.A combinational circuit that performs arithmetic operations
B.A group of flip-flops used to store binary information
C.A circuit that converts analog signals to digital
D.A device that generates clock pulses
Correct Answer: A group of flip-flops used to store binary information
Explanation:A register consists of a group of flip-flops and gates that affect their transition. The flip-flops hold the binary information.
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2How many flip-flops are required to construct an -bit register?
A.
B.
C.
D.
Correct Answer:
Explanation:Since a single flip-flop stores one bit of information, an -bit register requires flip-flops.
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3In a Serial-In Serial-Out (SISO) shift register with flip-flops, how many clock pulses are required to shift an -bit number completely into the register?
A.
B.
C.
D.
Correct Answer:
Explanation:To load bits serially into an -bit register, clock pulses are required.
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4Which type of shift register allows data to be entered all at once and read out all at once?
A.Serial-In Serial-Out (SISO)
B.Serial-In Parallel-Out (SIPO)
C.Parallel-In Serial-Out (PISO)
D.Parallel-In Parallel-Out (PIPO)
Correct Answer: Parallel-In Parallel-Out (PIPO)
Explanation:PIPO registers allow parallel loading (entering data simultaneously) and parallel output (reading data simultaneously).
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5What is the primary disadvantage of an Asynchronous (Ripple) counter compared to a Synchronous counter?
A.It requires more power
B.It is difficult to design
C.It suffers from propagation delay accumulation
D.It cannot count downwards
Correct Answer: It suffers from propagation delay accumulation
Explanation:In a ripple counter, the output of one flip-flop drives the clock of the next. The delays add up (accumulate), limiting the maximum operating frequency and potentially causing glitches.
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6In a 4-bit Johnson Ring Counter, how many distinct states are there?
A.4
B.8
C.16
D.32
Correct Answer: 8
Explanation:A Johnson counter (or Switch-Tail Ring Counter) with flip-flops has a modulus of . For 4 bits, states.
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7What is the modulus (MOD number) of a standard -bit Ring Counter?
A.
B.
C.
D.
Correct Answer:
Explanation:A standard Ring Counter circulates a single '1' (or '0') through flip-flops, resulting in unique states.
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8Which component is strictly necessary to create a Universal Shift Register?
A.Decoders
B.Multiplexers (MUX)
C.Comparators
D.Analog-to-Digital Converters
Correct Answer: Multiplexers (MUX)
Explanation:Multiplexers are used at the input of each flip-flop to select between different modes of operation (Hold, Shift Right, Shift Left, Parallel Load).
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9If the input frequency to a MOD-16 counter is 16 kHz, what is the output frequency?
A.1 kHz
B.16 kHz
C.256 kHz
D.32 kHz
Correct Answer: 1 kHz
Explanation:A counter acts as a frequency divider. . Hz (1 kHz).
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10In a Synchronous counter, how is the clock signal applied?
A.To the first flip-flop only
B.To the last flip-flop only
C.Simultaneously to all flip-flops
D.Cascaded from one flip-flop to the next
Correct Answer: Simultaneously to all flip-flops
Explanation:In synchronous counters, the clock pulse is applied to the Clock input of all flip-flops simultaneously to ensure they change states at the same time.
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11For a JK flip-flop to operate in 'toggle' mode within a counter, what must the inputs be?
A.
B.
C.
D.
Correct Answer:
Explanation:When and , the JK flip-flop toggles its output state on every active clock edge, which is essential for counting.
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12Which of the following is an application of a Serial-In Parallel-Out (SIPO) shift register?
A.Parallel data transmission
B.Serial-to-Parallel data conversion
C.Voltage regulation
D.Analog signal filtering
Correct Answer: Serial-to-Parallel data conversion
Explanation:SIPO registers take data in serially (one bit at a time) and make it available at the output lines simultaneously (parallel), converting serial data to parallel data.
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13To design a MOD-10 (Decade) asynchronous counter using JK flip-flops, which gate is used to reset the counter?
A.OR gate
B.NAND gate
C.NOT gate
D.XOR gate
Correct Answer: NAND gate
Explanation:A MOD-10 counter counts 0-9. When it hits 10 (), it must reset. A NAND gate senses the (8) and (2) high outputs and sends a low signal to the active-low Clear inputs.
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14What happens in a Bidirectional Shift Register when the direction control signal is changed?
A.The data is erased
B.The data bits shift in the opposite direction on the next clock
C.The register stops working
D.The register converts to a counter
Correct Answer: The data bits shift in the opposite direction on the next clock
Explanation:A bidirectional shift register has logic gates that allow data to be shifted either right or left depending on the state of the mode control input.
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15A 5-bit ripple counter counts from:
A.0 to 5
B.0 to 15
C.0 to 31
D.0 to 32
Correct Answer: 0 to 31
Explanation:A counter with bits counts from $0$ to . For , .
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16Which statement best describes a 'Universal Shift Register'?
A.It can only shift data right
B.It can shift left, shift right, and perform parallel loading
C.It is used for universal time keeping
D.It works with any voltage level
Correct Answer: It can shift left, shift right, and perform parallel loading
Explanation:A Universal Shift Register (e.g., 74194) is capable of shifting data in both directions and loading data in parallel, as well as holding data.
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17In a 4-bit Ring Counter initialized with $1000$, what is the state after 2 clock pulses?
18What is the feedback connection for a Johnson Counter?
A.Output of the last stage to Input of the first stage
B.Output of the last stage to Input of the first stage
C.Output of the first stage to Input of the last stage
D.Output of the first stage to Input of the last stage
Correct Answer: Output of the last stage to Input of the first stage
Explanation:A Johnson counter connects the inverted output () of the last flip-flop to the input of the first flip-flop, creating a 'twisted' ring.
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19How many unused states are there in a 4-bit Johnson Counter?
A.0
B.4
C.8
D.12
Correct Answer: 8
Explanation:Total states for 4 bits = . A 4-bit Johnson counter uses states. Unused states = .
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20Shifting a binary number to the left by one position is equivalent to:
A.Addition by 2
B.Subtraction by 2
C.Multiplication by 2
D.Division by 2
Correct Answer: Multiplication by 2
Explanation:In binary arithmetic, a left shift moves bits to higher powers of two, effectively multiplying the value by 2 (assuming no overflow).
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21Which table is used to determine the input logic for the flip-flops when designing a Synchronous Counter?
A.Truth Table
B.Excitation Table
C.Function Table
D.Characteristic Table
Correct Answer: Excitation Table
Explanation:The Excitation Table lists the required inputs ( or ) to achieve a specific transition from Present State () to Next State ().
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22What is the 'Lock-out' condition in counters?
A.When the counter stops counting
B.When the counter enters an unused state and cannot return to the valid sequence
C.When the clock is disconnected
D.When the counter resets to zero
Correct Answer: When the counter enters an unused state and cannot return to the valid sequence
Explanation:If a counter enters an unused state due to noise and the next state logic keeps it in unused states loop, it is locked out. Designs must be self-correcting to avoid this.
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23In a 3-bit Asynchronous Down Counter using negative edge-triggered flip-flops, the clock input of a flip-flop is driven by:
A.The output of the previous flip-flop
B.The output of the previous flip-flop
C.The main clock signal
D.The Clear input
Correct Answer: The output of the previous flip-flop
Explanation:For a down counter with negative edge-triggered FFs, the clock of the next stage is driven by the output of the previous stage. (Note: For an Up counter, it would be driven by or the FFs would need to be positive edge triggered with ).
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24What is the maximum delay in a 4-bit Asynchronous counter if the propagation delay of one flip-flop is ?
A.
B.
C.
D.
Correct Answer:
Explanation:In an asynchronous (ripple) counter, the delay is cumulative. For bits, the total delay is .
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25Which of the following is NOT a valid mode of operation for the 74194 Universal Shift Register?
A.Hold
B.Shift Left
C.Invert All Bits
D.Parallel Load
Correct Answer: Invert All Bits
Explanation:Standard Universal Shift Registers have modes: Hold (Do nothing), Shift Right, Shift Left, and Parallel Load. They do not have a dedicated 'Invert All' mode.
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26How many flip-flops are needed to design a MOD-12 counter?
A.3
B.4
C.5
D.12
Correct Answer: 4
Explanation:The number of flip-flops must satisfy . (too small), (sufficient). So, 4 flip-flops.
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27Which shift register application allows data to be delayed by a specific number of clock cycles?
A.Sequence Generator
B.Serial Adder
C.Time Delay Line
D.Parallel Converter
Correct Answer: Time Delay Line
Explanation:A SISO shift register acts as a time delay line. The data output is delayed by clock cycles relative to the input.
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28The sequence $000, 001, 011, 111, 110, 100$ represents which type of counter?
A.Binary Up Counter
B.Ring Counter
C.Johnson Counter (3-bit)
D.Ripple Counter
Correct Answer: Johnson Counter (3-bit)
Explanation:This sequence shows the filling of 1s followed by the filling of 0s (Creeping code), which is characteristic of a 3-bit Johnson counter ( states).
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29For a Synchronous counter, the maximum operating frequency is determined by:
A.The sum of delays of all flip-flops
B.The delay of a single flip-flop plus combinational logic delay
C.The frequency of the input signal
D.The number of inputs
Correct Answer: The delay of a single flip-flop plus combinational logic delay
Explanation:Since all FFs are clocked simultaneously, the period is limited by the longest path: .
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30What is the state of the 'Clear' (CLR) input usually required to allow a counter to count?
A.Active (asserted)
B.Inactive (de-asserted)
C.Connected to Clock
D.Floating
Correct Answer: Inactive (de-asserted)
Explanation:The Clear input resets the counter. To allow counting, the Clear input must be inactive (e.g., High for active-low Clear).
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31In a 4-bit Ring Counter, if the initial state is $0000$, what will the sequence be?
A.$0000, 0001, 0010, ...$
B.$0000, 0000, 0000, ...$
C.$1111, 1111, 1111, ...$
D.$1000, 0100, 0010, ...$
Correct Answer: $0000, 0000, 0000, ...$
Explanation:A standard Ring counter circulates the data. If initialized to all zeros, the 0 circulates, and the state remains 0000 indefinitely unless it is self-starting.
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32Which logic gate is typically used to decode the output of a Ring Counter?
A.AND gate
B.No decoding logic is required
C.NAND gate
D.OR gate
Correct Answer: No decoding logic is required
Explanation:In a Ring counter, only one flip-flop is high at any time. Therefore, the output of the flip-flop itself indicates the state, requiring no decoding gates.
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33To convert a Serial-In Serial-Out register to a Serial-In Parallel-Out register, one must:
A.Add more flip-flops
B.Change the clock frequency
C.Tap the output of each flip-flop
D.Connect the output to the input
Correct Answer: Tap the output of each flip-flop
Explanation:The internal structure is similar; simply making the Q output of every flip-flop available externally creates a SIPO register.
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34What distinguishes a 'Self-Correcting' counter?
A.It runs without a clock
B.It automatically returns to a valid state sequence if it enters an invalid state
C.It corrects errors in the input voltage
D.It uses Error Correcting Code (ECC)
Correct Answer: It automatically returns to a valid state sequence if it enters an invalid state
Explanation:Self-correcting logic ensures that if the counter lands in an unused state (e.g., due to a glitch), the next clock pulse(s) will direct it back into the main counting loop.
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35In a 4-bit PIPO register using D flip-flops, if the data inputs are $1011$ and a clock edge occurs, what is the output?
A.$0000$
B.$1111$
C.$1011$
D.$0100$
Correct Answer: $1011$
Explanation:In a Parallel-In Parallel-Out register, the inputs are loaded directly to the outputs upon the active clock edge.
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36The term 'cascading' counters means:
A.Running them in parallel
B.Connecting the output of one counter to the clock input of another
C.Using them as shift registers
D.Applying high voltage
Correct Answer: Connecting the output of one counter to the clock input of another
Explanation:Cascading increases the total modulus. If a MOD-M counter drives a MOD-N counter, the total count is .
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37A counter composed of T flip-flops will count if the T input is held at logic:
A.0
B.1
C.Low
D.High Impedance
Correct Answer: 1
Explanation:A T (Toggle) flip-flop toggles its state when . If , it holds the state.
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38Which type of register is most suitable for performing arithmetic operations like serial addition?
A.Shift Register
B.Latch
C.Buffer
D.Ripple Counter
Correct Answer: Shift Register
Explanation:Shift registers are used in serial adders to feed bits one by one into a full adder.
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39Why are Ring and Johnson counters often preferred over binary counters for sequencing operations?
A.They use fewer flip-flops
B.They are glitch-free in decoding
C.They count higher numbers
D.They are asynchronous
Correct Answer: They are glitch-free in decoding
Explanation:Ring and Johnson counters change only one bit at a time (Gray-code like property for Johnson) or have unique single-bit outputs (Ring), avoiding the decoding glitches common in binary counters where multiple bits change simultaneously.
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40What is the binary representation of the decimal number 10, which triggers the reset in a BCD (Decade) counter?
A.1001
B.1010
C.1100
D.1110
Correct Answer: 1010
Explanation:. This state is detected to reset the counter to 0000.
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41In a 4-bit Bidirectional Shift Register, the mode control inputs are $01$. This usually corresponds to:
A.No change (Hold)
B.Shift Right
C.Shift Left
D.Parallel Load
Correct Answer: Shift Right
Explanation:While dependent on specific ICs (like 74194), the standard convention is often: 00=Hold, 01=Shift Right, 10=Shift Left, 11=Load.
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42When designing a counter with an arbitrary sequence (e.g., 0, 2, 4, 6...), the states 1, 3, 5, 7 are called:
A.Active states
B.Don't care states
C.Toggle states
D.Buffer states
Correct Answer: Don't care states
Explanation:States not included in the desired count sequence are treated as 'Don't Cares' (X) in the K-maps to simplify the combinational logic.
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43What happens to the data in a SISO register if the clock stops?
A.The data is lost immediately
B.The data is retained as long as power is applied
C.The data resets to all zeros
D.The data becomes inverted
Correct Answer: The data is retained as long as power is applied
Explanation:Registers are made of flip-flops, which are static volatile memory elements. They hold data as long as power is supplied, regardless of the clock.
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44Which equation represents the number of flip-flops () needed for a MOD- counter?
A.
B.
C.
D.
Correct Answer:
Explanation:The number of states a set of flip-flops can represent is . This must be greater than or equal to the desired Modulus .
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45In a serial transfer of data between two registers A and B, how is the transfer usually accomplished?
A.Output of A connected to Input of B, loops back to A
B.Output of A connected to Input of B
C.Both clocked by different clocks
D.Manual switching
Correct Answer: Output of A connected to Input of B
Explanation:To transfer data serially, the serial output of the source register is connected to the serial input of the destination register, and both are clocked synchronously.
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46A presettable counter is one that:
A.Starts counting from zero only
B.Can be loaded with any starting number
C.Can only count up
D.Does not require a clock
Correct Answer: Can be loaded with any starting number
Explanation:Presettable counters have parallel load inputs that allow the user to set the counter to a specific value before counting begins.
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47What is the primary function of the 'Load' input in a shift register?
A.To shift data right
B.To enable parallel data entry
C.To reset the register
D.To disable the clock
Correct Answer: To enable parallel data entry
Explanation:The Load input (often Active Low) enables the parallel data inputs to overwrite the current state of the flip-flops on the next clock edge.
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48Which of the following describes a 'Twisted Ring Counter'?
A.Binary Counter
B.Johnson Counter
C.Ripple Counter
D.Decade Counter
Correct Answer: Johnson Counter
Explanation:A Johnson counter is called a Twisted Ring Counter because the feedback loop is 'twisted' (inverted) by connecting to .
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49If a 4-bit Asynchronous counter is cleared and then receives 20 clock pulses, what is the binary output?
A.0010
B.0100
C.0101
D.0000
Correct Answer: 0100
Explanation:A 4-bit counter has MOD-16. After 20 pulses: . Binary for 4 is $0100$.
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50What is the characteristic equation for the Next State () of a D flip-flop used in register design?
A.
B.
C.
D.
Correct Answer:
Explanation:The D (Data) flip-flop simply transfers the data at input D to output Q on the clock edge. Thus, the next state equals the input D.