Unit 2: Fundamentals of Electricity and Devices

PHY175 — Modern Physics And Electronics 11 min read

I. Orientation

Modern electrical and electronic systems are based on the controlled movement of charge through conductors and semiconductors. Circuit laws developed from the nineteenth-century work of Georg Ohm and Gustav Kirchhoff; semiconductor devices later enabled rectification, switching, memory, sensing, and computation.

  • Charge and current: Electric charge (Q) is measured in coulombs (C), while current (I) is the rate of charge flow in amperes (A).
  • Voltage and energy: Voltage (V) is energy per unit charge, measured in volts (V); it creates the electric field that drives current.
  • Resistance: Resistance (R), measured in ohms ((\Omega)), opposes current and depends on material, length, and cross-sectional area.
  • Conventional direction: Current is treated as flowing from positive to negative potential, although electrons move in the opposite direction.
  • Semiconductor principle: Materials such as silicon have conductivity between conductors and insulators, and their conductivity can be controlled by doping, voltage, light, or temperature.
  • Power: Electrical power is the rate of energy transfer, commonly calculated as (P=VI), in watts (W).
  • System hierarchy: Diodes and transistors form circuits; circuits form processors, memories, communication systems, and IoT devices.

II. Electrical Circuit Laws — Rules for Voltage, Current, and Resistance

A. Fundamentals of electrical laws

Fundamental electrical laws relate potential difference, current, resistance, charge conservation, and energy conservation in a circuit.

  • Ohm’s law: For a constant-temperature ohmic resistor, voltage equals current multiplied by resistance:
    TEXT
      V = IR

    (V) is voltage in volts, (I) is current in amperes, and (R) is resistance in ohms.
  • Kirchhoff’s current law (KCL): The algebraic sum of currents at a node is zero because charge does not accumulate ideally:
    TEXT
      ΣI_in = ΣI_out
  • Kirchhoff’s voltage law (KVL): The algebraic sum of voltage rises and drops around a closed loop is zero, expressing conservation of energy.
  • Series resistance: Resistors in series carry the same current:
    TEXT
      R_total = R1 + R2 + ... + Rn
  • Parallel resistance: Resistors in parallel have the same voltage:
    TEXT
      1/R_total = 1/R1 + 1/R2 + ... + 1/Rn
  • Power relations: For a resistor, (P=VI=I^2R=V^2/R). A (100\ \Omega) resistor carrying (0.2) A dissipates (4) W.

B. Voltage division rule

The voltage division rule determines how an applied voltage is distributed among series resistors.

  • Formal rule: For series resistors (R_1,\ldots,Rn) connected to (V{\text{in}}), the voltage across (R_k) is:
    TEXT
      V_k = V_in × R_k / (R1 + R2 + ... + Rn)
  • Condition: The resistors must be in series, so the same current flows through each.
  • Derivation: Since (I=V{\text{in}}/R{\text{total}}), the drop across (R_k) is (V_k=IR_k).
  • Worked example: With (V_{\text{in}}=12) V, (R_1=2\ \text{k}\Omega), and (R_2=4\ \text{k}\Omega), the output across (R_2) is (12(4/6)=8) V.
  • Loading effect: Connecting a load (R_L) across the output changes the lower resistance to (R_2\parallel R_L), so practical dividers must account for load current.

C. Current division rule

The current division rule calculates how total current splits among parallel branches.

  • Two-branch rule: For (R_1) and (R_2) in parallel carrying total current (I_T):
    TEXT
      I1 = I_T × R2/(R1 + R2)
      I2 = I_T × R1/(R1 + R2)
  • Physical reason: Both branches have the same voltage, so the lower-resistance branch carries more current.
  • General conductance form: With conductance (G_k=1/R_k), branch current is:
    TEXT
      Ik = I_T × Gk/(G1 + G2 + ... + Gn)
  • Worked example: If (I_T=6) A enters (R_1=2\ \Omega) and (R_2=4\ \Omega), then (I_1=4) A and (I_2=2) A.
  • Verification: KCL confirms (I_T=I_1+I_2), while unequal branch resistances produce unequal currents.

III. PN Junction Diode — One-Way Semiconductor Conduction

A. PN junction diode (working and characteristics)

A PN junction diode is a two-terminal semiconductor device formed by joining p-type and n-type silicon; its main purpose is to conduct strongly in one direction.

  • Junction formation: P-type material contains holes as majority carriers; n-type material contains electrons. Diffusion near the boundary leaves fixed ions and creates a depletion region.
  • Barrier potential: The depletion region produces an internal electric field and a potential barrier, approximately (0.7) V for silicon and (0.3) V for germanium at room temperature.
  • Forward bias: Connecting p-side to positive voltage and n-side to negative voltage reduces the barrier; current rises rapidly after the knee voltage.
  • Reverse bias: Reversing the terminals widens the depletion region, allowing only a small reverse saturation current until breakdown.
  • Current-voltage characteristic: The diode equation is:
    TEXT
      I = IS [e^(VD/(nVT)) - 1]

    (I_S) is saturation current, (V_D) is diode voltage, (n) is the ideality factor, and (V_T) is thermal voltage, about (25.9) mV at (300) K.
  • Ratings: Maximum forward current, reverse voltage, power dissipation, and breakdown voltage determine safe operation.

B. Applications of PN junction diode (rectifiers and switch)

A diode converts, selects, or controls electrical signals because its resistance changes greatly with polarity.

  • Half-wave rectifier: A single diode passes one half-cycle of an AC input and blocks the other, producing pulsating DC. Its ideal average output for peak voltage (V_m) is (V_m/\pi).
  • Full-wave bridge rectifier: Four diodes use both AC half-cycles without requiring a center-tapped transformer. A capacitor filter reduces ripple by charging near waveform peaks.
  • Diode as a switch: In forward bias it approximates a closed switch with a small voltage drop; in reverse bias it approximates an open switch with negligible current.
  • Protection use: A flyback diode placed across a relay coil provides a path for inductive current when the switch opens, protecting the transistor from a high-voltage spike.
  • Limitations: Rectifiers have ripple, diode forward loss, reverse recovery time, and maximum current and voltage constraints.

IV. BJT Basic Operations — Current-Controlled Transistor Action

A bipolar junction transistor (BJT) uses a small base current to control a larger collector current and is available as NPN or PNP.

  • Structure: An NPN transistor has n-type emitter, p-type base, and n-type collector; the base is thin and lightly doped.
  • Active operation: The emitter-base junction is forward biased and collector-base junction reverse biased. Electrons injected from the emitter cross the base and are collected.
  • Current relations:
    TEXT
      IE = IC + IB
      IC ≈ βIB

    (I_E), (I_C), and (I_B) are emitter, collector, and base currents; (\beta) is common-emitter current gain.
  • Operating regions: Cutoff means both junctions are effectively off; active mode supports amplification; saturation turns both junctions on for switching.
  • Switch example: A microcontroller base current can drive an NPN transistor that switches a relay, provided base resistance, collector current, and power dissipation are selected correctly.

V. CMOS Technology — Low-Power Digital Logic

Complementary metal-oxide-semiconductor (CMOS) technology combines n-channel and p-channel MOSFETs so that ideally one transistor network conducts while the other is off.

  • Inverter principle: A CMOS inverter uses a pMOS pull-up connected to (V_{DD}) and an nMOS pull-down connected to ground. Input high turns nMOS on and pMOS off, producing output low.
  • Logic advantages: Ideally, no direct DC path exists between supply and ground in stable states, so static power is very low.
  • Dynamic power: Charging and discharging capacitance consumes:
    TEXT
      P_dynamic ≈ α C_L V_DD² f

    (\alpha) is switching activity, (CL) load capacitance, (V{DD}) supply voltage, and (f) frequency.
  • Applications: CMOS forms logic gates, microprocessors, memory cells, image sensors, and system-on-chip devices.
  • Trade-offs: Smaller transistors increase density and speed but intensify leakage, heat removal, manufacturing variation, and short-channel effects.

VI. Semiconductor Memory Devices — RAM and SSD Storage

Semiconductor memory stores binary information using transistor states, charge levels, or floating-gate cells.

A. Semiconductor memory devices (RAM, SSD)

RAM provides fast working storage, while SSDs provide nonvolatile mass storage using flash memory.

  • RAM operation: DRAM stores each bit as charge in a capacitor controlled by a transistor; it requires periodic refresh. SRAM uses cross-coupled CMOS inverters and is faster but occupies more area.
  • Volatility: RAM loses data when power is removed, whereas flash memory retains charge without continuous power.
  • SSD structure: An SSD contains NAND flash cells, a controller, error-correction circuitry, firmware, and an interface such as SATA or NVMe.
  • Flash storage: Floating-gate or charge-trap cells store electrons; threshold-voltage ranges represent SLC, MLC, TLC, or QLC data levels.
  • Performance factors: SSD speed depends on interface bandwidth, controller parallelism, cache, write amplification, and flash endurance.
  • Comparison: RAM is measured mainly by latency and bandwidth; SSDs emphasize capacity, persistence, random access, and write-cycle durability.

VII. AI Accelerator Chips — Hardware for Parallel Inference and Training

AI accelerator chips are specialized processors designed to execute matrix, vector, and tensor operations efficiently.

  • Core computation: Neural networks repeatedly perform multiply-accumulate operations:
    TEXT
      y = Σ(wi × xi) + b

    (w_i) are weights, (x_i) inputs, and (b) a bias.
  • Architecture: GPUs, tensor processing units, neural processing units, and custom ASICs use many parallel arithmetic units and high-bandwidth memory.
  • Precision: INT8 or FP16 arithmetic can reduce memory traffic and energy compared with FP32 while maintaining suitable model accuracy.
  • Data movement: On-chip caches, tiled matrix multiplication, and sparsity support reduce the costly movement of weights and activations.
  • Deployment: Training requires high throughput and flexible precision; edge inference prioritizes low power, small size, privacy, and real-time response.

VIII. Sensor Technology in IoT Systems — Measuring the Physical World

Sensors convert physical quantities into electrical signals so connected devices can monitor and respond to their surroundings.

  • Measured variables: Temperature sensors use resistance or semiconductor junction behavior; accelerometers measure motion; gas, light, pressure, humidity, and proximity sensors use specialized transducers.
  • Signal chain: A typical IoT node contains sensor, signal conditioning, ADC, microcontroller, communication module, and power source.
  • Conversion: An ADC maps an analog voltage to a digital code. An (N)-bit ADC with reference (V{\text{ref}}) has approximate resolution (V{\text{ref}}/2^N).
  • Connectivity: Wi-Fi, Bluetooth Low Energy, Zigbee, LoRaWAN, and cellular IoT transport measurements to gateways or cloud platforms.
  • Design concerns: Calibration, noise filtering, sampling rate, battery life, security, environmental protection, and sensor drift determine reliability.
  • Example: A smart thermostat samples temperature, compares it with a set point, and controls heating through a network-connected relay.

IX. Introduction to Computer Network (CN) — Connected Communication Systems

A computer network is an interconnected set of devices that exchanges data using agreed protocols, addressing methods, and transmission media.

  • Network components: End devices generate data; switches connect local devices; routers forward packets between networks; access points provide wireless links.
  • Layered model: The OSI model separates physical, data-link, network, transport, session, presentation, and application functions. TCP/IP commonly groups these into fewer layers.
  • Addressing: MAC addresses identify network interfaces locally; IP addresses identify network locations; ports identify application processes.
  • Packet switching: Data is divided into packets containing headers and payloads. Routers use destination IP addresses to select forwarding paths.
  • Protocols: TCP provides reliable ordered delivery; UDP reduces overhead for time-sensitive traffic; HTTP and DNS support web access and name resolution.
  • Performance and security: Bandwidth, latency, packet loss, throughput, encryption, authentication, and firewalls affect practical network quality.

X. Optical Fiber and Wireless Communication — Transmission Media

Communication systems transfer information by modulating an electromagnetic carrier through a guided or unguided medium.

A. Optical fiber and wireless communication

Optical fiber uses light in glass, while wireless communication uses radio or microwave electromagnetic waves through air.

  • Optical principle: Fiber confines light by total internal reflection between a higher-index core and lower-index cladding.
  • Fiber advantages: It offers high bandwidth, low attenuation, long distance, electrical isolation, and immunity to electromagnetic interference.
  • Fiber types: Single-mode fiber supports long-distance, high-bandwidth links; multimode fiber is commonly used for shorter building or data-center connections.
  • Wireless systems: A transmitter modulates a radio carrier; an antenna radiates it, and a receiver demodulates the signal. Wi-Fi, cellular, Bluetooth, and satellite links use this principle.
  • Wireless limitations: Distance, obstacles, interference, multipath fading, spectrum availability, and security affect performance.
  • Comparison: Fiber generally provides greater capacity and security against electromagnetic interception; wireless provides mobility and easier deployment.

XI. Comparisons Between CPU and GPU — General-Purpose and Parallel Processing

A CPU is optimized for varied sequential tasks and control flow, whereas a GPU is optimized for large numbers of similar operations performed in parallel.

  • CPU structure: A CPU has a small number of powerful cores, large caches, sophisticated branch prediction, and low-latency execution.
  • GPU structure: A GPU has many simpler arithmetic cores grouped into streaming multiprocessors, providing high throughput for vector and matrix workloads.
  • Workload fit: CPUs suit operating systems, serial algorithms, branching, and irregular memory access; GPUs suit graphics, simulations, machine learning, and data-parallel computation.
  • Memory behavior: CPU caches reduce latency for unpredictable access; GPUs depend on massive parallelism and high memory bandwidth to hide latency.
  • Energy and flexibility: CPUs are flexible for general applications; GPUs can deliver greater performance per watt for suitable parallel workloads but require parallel programming.
  • Combined systems: Modern computers use CPUs for orchestration and GPUs or AI accelerators for computationally intensive kernels, balancing latency, throughput, memory, and power.