Unit 3: Processing Data - Subjective Questions

Data refers to raw, unprocessed facts, figures, symbols, or values that have no inherent meaning on their own (e.g., numbers, characters, images).

Information is data that has been processed, organized, and structured in a meaningful context so that it becomes useful for decision-making.

Transformation Process:

• Input: Raw data is entered into the computer (e.g., marks of students).
• Processing: The CPU performs operations such as sorting, calculating, and summarizing on the data.
• Output: The processed result is presented as meaningful information (e.g., average marks, pass/fail status).
• Storage: Information may be stored for future use.

Example: A list of individual sales figures is data. When these figures are summed and analyzed to show total monthly revenue and trends, it becomes information.

The cycle can be summarized as: Data → Processing → Information.

Computers represent all data using the binary number system, which uses only two digits: 0 and 1. Each digit is called a bit (binary digit).

Why binary?

• Electronic components have two stable states: ON (1) and OFF (0), corresponding to the presence or absence of electrical voltage.
• It is reliable and less error-prone because distinguishing between two states is easier than between ten.
• It simplifies the design of digital circuits and logic gates.

Representation:

• A group of 8 bits forms a byte, which can represent different values.
• Numbers, text, images, audio, and video are all ultimately converted into sequences of 0s and 1s.

Example: The decimal number 5 is represented in binary as , calculated as .

Encoding schemes are standardized systems that assign unique binary codes to characters (letters, digits, symbols) so computers can store and process text.

1. ASCII (American Standard Code for Information Interchange):

• Uses 7 bits (extended ASCII uses 8 bits) to represent (or ) characters.
• Includes English letters, digits, punctuation, and control characters.
• Example: 'A' = 65, 'a' = 97.

2. EBCDIC (Extended Binary Coded Decimal Interchange Code):

• An 8-bit encoding scheme developed by IBM, mainly used on mainframe computers.
• Represents up to characters.

3. Unicode:

• A universal encoding standard using 16 bits or more, capable of representing over 65,000 characters.
• Supports almost all writing systems and languages worldwide (e.g., Chinese, Arabic, emojis).
• It is backward compatible with ASCII.

Unicode has become the modern standard because it removes the language limitations of ASCII and EBCDIC.

The CPU (Central Processing Unit) is the brain of the computer that executes instructions. It has three main components:

1. Control Unit (CU):

• Directs and coordinates all operations of the computer.
• Fetches instructions from memory, decodes them, and controls the flow of data between components.
• Sends control signals but does not perform actual calculations.

2. Arithmetic Logic Unit (ALU):

• Performs all arithmetic operations (addition, subtraction, multiplication, division).
• Performs logical operations (comparisons such as greater than, less than, equal to, AND, OR, NOT).

3. Registers:

• Small, high-speed storage locations inside the CPU that temporarily hold data and instructions during processing.

Together, these components work with the system clock and buses to fetch, decode, execute, and store instructions.

A machine cycle (also called the instruction cycle) is the sequence of steps the CPU follows to process a single instruction. It consists of four stages:

1. Fetch:

• The Control Unit retrieves the next instruction from main memory (RAM).
• The instruction's address is provided by the program counter.

2. Decode:

• The Control Unit interprets/decodes the fetched instruction to determine what operation is required.

3. Execute:

• The ALU performs the required arithmetic or logical operation.

4. Store (Write-back):

• The result of the operation is stored back in a register or memory.

Diagram (conceptual flow):

Fetch → Decode → Execute → Store → (repeat)

The first two steps (Fetch, Decode) form the instruction cycle, and the last two (Execute, Store) form the execution cycle. The speed at which these cycles occur is measured in Hertz (Hz) by the system clock.

The machine cycle is divided into two parts: the I-cycle and the E-cycle.

Summary:

• The I-cycle identifies what is to be done.
• The E-cycle actually does it and saves the outcome.

Together, both cycles complete one full machine cycle.

Memory is the part of a computer that stores data, instructions, and results either temporarily or permanently for processing.

Primary Memory (Main Memory):

• Directly accessible by the CPU.
• Fast but relatively expensive and limited in size.
• Includes RAM (volatile) and ROM (non-volatile).
• Data is lost when power is off (in the case of RAM).

Secondary Memory (Auxiliary Storage):

• Used for permanent storage of data.
• Slower but larger and cheaper.
• Non-volatile (retains data without power).
• Examples: Hard disks, SSDs, USB drives, CDs/DVDs.

RAM (Random Access Memory) and ROM (Read Only Memory) are two types of primary memory.

Types of RAM:

• SRAM (Static RAM): Faster, used in cache.
• DRAM (Dynamic RAM): Needs refreshing, used as main memory.

Types of ROM:

• PROM (Programmable ROM)
• EPROM (Erasable Programmable ROM)
• EEPROM (Electrically Erasable Programmable ROM)

Registers are small, extremely fast storage locations located inside the CPU that temporarily hold data, instructions, and addresses during processing. They are the fastest form of memory in a computer.

Common Types of Registers:

• Accumulator (AC): Stores intermediate arithmetic and logical results.
• Program Counter (PC): Holds the address of the next instruction to be executed.
• Instruction Register (IR): Holds the current instruction being executed.
• Memory Address Register (MAR): Holds the address of the memory location to be accessed.
• Memory Buffer/Data Register (MBR/MDR): Holds the data that is being transferred to or from memory.
• General Purpose Registers: Used to store temporary data during operations.

Importance:

• They speed up processing because the CPU can access them faster than main memory.
• The size of a register (e.g., 32-bit, 64-bit) determines how much data the CPU can process at once (word size).

A bus is a set of physical electrical pathways (wires or conductors) that transfer data, addresses, and control signals between the components of a computer such as the CPU, memory, and I/O devices.

Three Main Types of Buses:

1. Data Bus:

• Carries the actual data between the CPU, memory, and peripherals.
• Bidirectional (data can move both ways).
• Its width (e.g., 32-bit, 64-bit) determines how much data can be transferred at once.

2. Address Bus:

• Carries the memory addresses of the location where data is to be read from or written to.
• Unidirectional (from CPU to memory).
• Its width determines the maximum addressable memory. For address lines, memory addressable is locations.

3. Control Bus:

• Carries control and timing signals (e.g., read/write signals, clock signals) to coordinate operations.
• Bidirectional.

Cache memory is a small, high-speed memory located between the CPU and main memory (RAM). It stores frequently accessed data and instructions so the CPU can retrieve them quickly, reducing the average time to access data.

Purpose:

• To bridge the speed gap between the fast CPU and the slower main memory.
• To improve overall system performance by reducing memory access latency.

Levels of Cache:

• L1 Cache (Level 1): Smallest and fastest, built directly into the CPU chip. Typically a few KB.
• L2 Cache (Level 2): Larger but slightly slower than L1. May be on the CPU or nearby.
• L3 Cache (Level 3): Largest and slowest of the caches, shared among CPU cores.

Working Principle:

• Based on the principle of locality of reference — data recently used is likely to be used again soon.
• When the CPU needs data, it first checks the cache (cache hit); if not found (cache miss), it fetches from main memory.

The memory hierarchy organizes different types of memory based on speed, cost, and capacity. As we move up the hierarchy, speed and cost per bit increase, while capacity decreases.

Hierarchy (top = fastest, bottom = slowest):

    Registers        (fastest, smallest, costliest)
       ↓
   Cache Memory (L1, L2, L3)
       ↓
 Primary Memory (RAM)
       ↓

Secondary Storage (SSD, HDD)
↓
Tertiary/Backup Storage (Tape, Cloud) (slowest, largest, cheapest)

Key Points:

• Registers are inside the CPU and the fastest.
• Cache stores frequently used data.
• RAM holds currently running programs.
• Secondary storage provides permanent, large-capacity storage.

Trade-off: Faster memory is more expensive per bit, so a mix of memory types is used to balance cost and performance.

Data in computers is measured using the following units:

• Bit: The smallest unit of data, representing a single binary digit (0 or 1).
• Byte: A group of 8 bits. It can represent one character.

Relationships (using ):

Higher units:

These units are used to express memory capacity, file sizes, and storage.

The system clock is an electronic component that generates regular electrical pulses to synchronize all the operations of the CPU. Each pulse is called a clock cycle.

Clock Speed:

• It is the number of clock cycles the CPU can perform per second.
• Measured in Hertz (Hz):
  • cycles per second
  • cycles per second

Effect on Processing Speed:

• A higher clock speed means the CPU can execute more instructions per second, resulting in faster processing.
• Example: A 3.0 GHz processor performs 3 billion cycles per second.

Note: Clock speed alone does not determine performance. Other factors like the number of cores, cache size, word size, and bus width also affect overall speed.

SRAM and DRAM are two types of Random Access Memory used for different purposes.

Conclusion: SRAM is used where speed is critical (cache), while DRAM is used where large capacity at low cost is needed (main memory).

Processing an instruction involves coordination among several components through the machine cycle:

Step 1 – Fetch:

• The Program Counter (PC) holds the address of the next instruction.
• This address is placed on the address bus and sent to memory.
• The instruction travels back via the data bus and is stored in the Instruction Register (IR).
• The PC is incremented to point to the next instruction.

Step 2 – Decode:

• The Control Unit decodes the instruction in the IR to determine the operation.

Step 3 – Execute:

• The ALU performs the required arithmetic/logical operation using data from registers or memory (accessed via the MAR and MDR).

Step 4 – Store:

• The result is written back to a register (e.g., accumulator) or to memory via the data bus.

Role of Cache: Frequently used instructions/data are kept in cache to speed up the fetch stage. This cycle repeats continuously for each instruction in the program.

Word size refers to the number of bits that a CPU can process, transfer, or store as a single unit at one time. It is usually a multiple of 8 (e.g., 8-bit, 16-bit, 32-bit, 64-bit).

Influence on Performance:

• Larger word size = more data processed per cycle, improving speed.
• Determines the size of registers in the CPU.
• Affects the amount of addressable memory. For example, a 32-bit system can address up to bytes (about 4 GB), while a 64-bit system can address up to bytes.
• Influences the precision of arithmetic operations.

Example: A 64-bit processor can handle larger numbers and more memory than a 32-bit processor, making it suitable for modern applications requiring high performance and large RAM.

Method for Decimal-to-Binary Conversion:

• Repeatedly divide the decimal number by 2.
• Record the remainder at each step.
• Continue until the quotient becomes 0.
• The binary equivalent is the remainders read from bottom to top.

Conversion of :

Reading remainders from bottom to top: .

Therefore, .

Verification: .

These terms relate to the efficiency of cache memory.

Cache Hit:

• Occurs when the data or instruction requested by the CPU is found in the cache.
• Results in very fast access.

Cache Miss:

• Occurs when the requested data is not found in the cache, forcing the CPU to retrieve it from the slower main memory.
• Causes a delay and the data is then copied into cache for future use.

Hit Ratio:

• The ratio of the number of cache hits to the total number of memory accesses:
  

Importance of a High Hit Ratio:

• A higher hit ratio means more requests are served by the fast cache, reducing average memory access time.
• This directly improves CPU performance and system speed.
• Effective caching relies on the locality of reference principle.

Memory is classified based on whether it retains data when power is switched off.

Volatile Memory:

• Loses its contents when the power supply is turned off.
• Used for temporary storage of data being actively processed.
• Fast access.
• Examples: RAM (DRAM, SRAM), Cache, Registers.

Non-Volatile Memory:

• Retains its contents even without power.
• Used for permanent storage of data and programs.
• Examples: ROM, Hard Disk, SSD, Flash drives, CD/DVD.

Significance: Volatile memory enables fast processing of active tasks, while non-volatile memory ensures data and programs are preserved for long-term use.