Unit 6: Field Effect Transistors and FET Biasing

1. Introduction to Field Effect Transistors (FET)

The Field Effect Transistor (FET) is a unipolar semiconductor device in which current is carried by only one type of charge carrier (either electrons or holes). Unlike the Bipolar Junction Transistor (BJT), which is a current-controlled device, the FET is a voltage-controlled device. The voltage applied to the input (gate) terminal controls the current flowing through the output (drain to source) channel. FETs are known for their extremely high input impedance.

2. Construction and Characteristics of JFETs

The Junction Field Effect Transistor (JFET) is the simplest type of FET. It comes in two types: n-channel and p-channel.

2.1 Construction of n-Channel JFET

• Structure: It consists of a narrow bar of n-type semiconductor material with a p-type region heavily doped on opposite sides.
• Terminals:
  • Source (S): The terminal through which the majority carriers enter the bar.
  • Drain (D): The terminal through which the majority carriers leave the bar.
  • Gate (G): The heavily doped p-type regions are internally connected to form the Gate terminal.
• Channel: The region of n-type material between the two p-regions is the channel.

2.2 Operation and Characteristics

In an n-channel JFET, the Gate-to-Source junction is always reverse-biased.

• Depletion Regions: The reverse bias creates a depletion region at the p-n junctions. Increasing the reverse bias voltage (making more negative) widens the depletion regions, narrowing the conductive channel.
• Pinch-Off Voltage (): The value of that makes the depletion regions touch, completely closing off the channel and reducing drain current () to nearly zero, is called the pinch-off voltage (also denoted as ).
• Maximum Drain Current (): The maximum drain current occurs when and the Drain-to-Source voltage () is greater than .

2.3 Characteristic Curves

1. Drain Characteristics (Output Characteristics): A plot of versus for constant values of .
   • Ohmic Region: At low , the JFET acts as a voltage-variable resistor.
   • Saturation (Active) Region: remains relatively constant despite increases in . The FET operates as an amplifier in this region.
   • Breakdown Region: If becomes too large, avalanche breakdown occurs, and increases sharply.
2. Transfer Characteristics: A plot of versus for a constant . This curve follows Shockley’s Equation:
   

3. Depletion-Type MOSFET (D-MOSFET)

The Metal-Oxide-Semiconductor FET (MOSFET) differs from the JFET primarily in that the gate terminal is electrically insulated from the channel by a thin layer of silicon dioxide ().

3.1 Construction

• A slab of lightly doped p-type material (substrate) forms the base.
• Two heavily doped n-regions are diffused into the substrate (Source and Drain).
• A physically constructed n-channel connects the source and drain.
• An insulating layer covers the channel, and a metallic plate is laid on top to form the Gate.

3.2 Operation

The D-MOSFET can operate in two distinct modes due to its insulated gate:

1. Depletion Mode (): Applying a negative voltage to the gate repels electrons from the channel, depleting it of charge carriers and reducing .
2. Enhancement Mode (): Applying a positive voltage attracts additional electrons into the channel from the p-type substrate, widening the channel and increasing beyond .

3.3 Characteristics

The D-MOSFET also follows Shockley's equation. The transfer characteristic curve extends into both the positive and negative regions, making it highly versatile.

4. Enhancement-Type MOSFET (E-MOSFET)

The E-MOSFET is the most widely used FET in digital logic and large-scale integrated (LSI) circuits.

4.1 Construction

• Similar to the D-MOSFET, but there is no physical channel initially connecting the drain and source.
• The substrate extends all the way to the layer.

4.2 Operation

• Threshold Voltage ( or ): Because there is no initial channel, when . A positive must be applied.
• Channel Formation: When is positive enough (greater than ), it repels holes in the p-substrate and attracts electrons to the surface just below the layer, inducing an n-channel (inversion layer).
• Once , current begins to flow.

4.3 Characteristics

Unlike JFETs and D-MOSFETs, the E-MOSFET does not follow Shockley's equation. Its transfer characteristic is defined by:

Where is a constant dependent on the physical geometry of the device.

5. FET Biasing Configurations

Biasing establishes a stable operating point (Q-point) defined by fixed DC values of , , and . Because gate current , the analysis is simplified ().

5.1 Fixed-Bias Configuration

• Circuit: Uses two separate DC power supplies ( for the drain, for the gate).
• Analysis:
  • Since , the voltage drop across the gate resistor is zero.
  • (constant).
  • is determined directly from Shockley's equation.
  • .
• Drawback: It requires two power supplies and has poor stability against variations in device parameters ( and ).

5.2 Self-Bias Configuration

• Circuit: Eliminates the need for . Instead, a resistor is placed at the source terminal.
• Analysis:
  • The gate is tied to ground via , so .
  • The voltage at the source is .
  • Therefore, .
  • This equation () forms the bias line. The intersection of this line with the device's transfer curve gives the Q-point.
  • .
• Advantage: Uses a single power supply and offers better Q-point stability than fixed bias.

5.3 Voltage-Divider Biasing

• Circuit: Uses a voltage divider network ( and ) at the gate.
• Analysis:
  • Gate voltage .
  • Source voltage .
  • .
  • This is a linear equation that can be plotted over the transfer curve to find the intersection (Q-point).
  • .
• Advantage: Provides excellent stability. The Q-point is relatively immune to variations in and across different transistors of the same type.

6. Understanding the Datasheets of FETs

A FET datasheet provides critical parameters required for circuit design. Key specifications include:

• Maximum Ratings:
  • : Maximum Drain-to-Source voltage. Exceeding this causes breakdown.
  • : Maximum Gate-to-Source voltage. Exceeding this destroys the insulating oxide layer (in MOSFETs) or forward-biases the junction (in JFETs).
  • : Total Device Dissipation (maximum power the device can safely dissipate as heat).
• Electrical Characteristics (Off):
  • : Gate-to-Source breakdown voltage.
  • : Gate reverse current (leakage current). Should be extremely low (typically nA or pA).
  • : Gate-Source cutoff voltage (Pinch-off voltage ).
• Electrical Characteristics (On):
  • : Zero-gate-voltage drain current.
  • : Drain-to-Source on-resistance. Crucial for switching MOSFETs (lower is better to reduce losses).
• Small-Signal Characteristics:
  • or : Forward transconductance (change in for a given change in ). Indicates the gain capability.
  • : Input, output, and reverse transfer capacitances. Crucial for high-frequency and fast-switching applications.

7. Understanding the Datasheet of FETs 2N5457, 2N5458, 2N5459

The 2N5457, 2N5458, and 2N5459 form a family of N-channel JFETs widely used for general-purpose audio and switching applications.

7.1 General Family Characteristics

• Package: Typically TO-92 (plastic through-hole).
• Maximum Ratings:
  • Drain-Gate Voltage (): 25V
  • Reverse Gate-Source Voltage (): -25V
  • Power Dissipation: 310 mW

7.2 Differences Among the Series

While sharing the same silicon architecture, variations in the manufacturing process yield different operational parameters. Datasheets separate them primarily by their and ranges:

• 2N5457:
  • : 1.0 mA (min) to 5.0 mA (max).
  • : -0.5V to -6.0V.
  • Application: Best for low-current, low-pinch-off voltage applications.
• 2N5458:
  • : 2.0 mA (min) to 9.0 mA (max).
  • : -1.0V to -7.0V.
  • Application: Intermediate current requirements.
• 2N5459:
  • : 4.0 mA (min) to 16.0 mA (max).
  • : -2.0V to -8.0V.
  • Application: Suitable for higher current circuits requiring a larger voltage swing to turn off.

Note on Design: Because the spread of and is very wide even within a specific part number (e.g., -0.5V to -6.0V for the 5457), designers must use self-bias or voltage-divider bias configurations to ensure the circuit operates predictably regardless of the exact component pulled from the bin.

8. Recent Trends in Electronics (FET Perspective)

The landscape of field-effect transistors is rapidly evolving to meet the demands of higher computational power, miniaturization, and energy efficiency.

8.1 FinFETs and 3D Transistors

To overcome the limitations of planar MOSFETs at node sizes below 20nm (such as short-channel effects and current leakage), the industry shifted to FinFETs. In a FinFET, the channel is a 3D vertical "fin." The gate wraps around three sides of the fin, providing superior electrostatic control over the channel, reducing leakage, and allowing faster switching speeds.

8.2 Gate-All-Around FETs (GAAFET)

As scaling approaches 2nm and below, FinFETs hit physical limitations. GAAFETs (including nanosheet and nanowire transistors) are the successor. In a GAAFET, the gate material completely surrounds the channel region on all four sides. This maximizes gate control, significantly reduces power consumption, and is currently driving the next generation of semiconductor fabrication (led by foundries like TSMC, Samsung, and Intel).

8.3 Wide Bandgap Semiconductors (SiC and GaN)

In power electronics, traditional silicon (Si) power MOSFETs are being replaced by Silicon Carbide (SiC) and Gallium Nitride (GaN) FETs.

• SiC MOSFETs: Capable of operating at much higher voltages, temperatures, and switching frequencies. Widely used in Electric Vehicle (EV) inverters.
• GaN HEMTs (High Electron Mobility Transistors): Provide exceptionally low and incredibly fast switching speeds, making them ideal for ultra-compact, high-efficiency power supplies and fast chargers for consumer electronics.

8.4 Flexible and Transparent Electronics

Organic Field Effect Transistors (OFETs) and Thin-Film Transistors (TFTs) utilizing materials like Indium Gallium Zinc Oxide (IGZO) are gaining traction for use in flexible displays, wearable health monitors, and transparent electronic applications.