What is the Boolean expression for the **Sum** ($S$) of a Full Adder with inputs $A, B, C_{in}$?

$$S = A \oplus B \oplus C_{in}$$

$$S = (A \oplus B) \cdot C_{in}$$

ECE249 Unit 4: Introduction to Combinational Logic Circuits - MCQ Practice | B. Tech. CSE

1 $Which of the following is a characteristic of a combinational logic circuit?$

A.

Its output depends only on the present inputs

B.

It requires a clock signal to operate

C.

It has memory elements to store data

D.

Its output depends on the present input as well as past outputs

2 $What are the outputs of a Half Adder?$

A.

Difference and Borrow

B.

Sum and Carry

C.

Quotient and Remainder

D.

Sum and Difference

3 $The logic equation for the Sum output of a Half Adder with inputs and is:$

A.

B.

C.

D.

4 $The logic equation for the Carry output of a Half Adder with inputs and is:$

A.

B.

C.

D.

5 $How many inputs does a Full Adder have?$

A.

1

B.

2

C.

4

D.

3

6 $A Full Adder can be implemented using:$

A.

Two Half Adders and one AND gate

B.

One Half Adder and two OR gates

C.

Two Half Adders and one OR gate

D.

Two OR gates and two AND gates

7 $What is the Boolean expression for the Sum () of a Full Adder with inputs ?$

A.

B.

C.

D.

8 $The Carry output () of a Full Adder is 1 when:$

A.

Only the carry input is high

B.

Two or more inputs are high

C.

Only one input is high

D.

All inputs are low

9 $Which logic gate is exclusively used to determine the Difference in a Half Subtractor?$

A.

XOR gate

B.

NAND gate

C.

OR gate

D.

AND gate

10 $The Boolean expression for the Borrow output () of a Half Subtractor (computing) is:$

A.

B.

C.

D.

11 $How many outputs does a Full Subtractor have?$

A.

3

B.

2

C.

1

D.

4

12 $In a 4-bit parallel adder (Ripple Carry Adder), the carry output of the second full adder is connected to:$

A.

The carry input of the first full adder

B.

The sum input of the third full adder

C.

The output of the fourth full adder

D.

The carry input of the third full adder

13 $A Multiplexer (MUX) is also known as a:$

A.

Data Selector

B.

Data Distributor

C.

Decoder

D.

Encoder

14 $A 4:1 Multiplexer has 4 data inputs. How many select lines does it require?$

A.

4

B.

2

C.

3

D.

1

15 $The output of a 2:1 Multiplexer with inputs and select line is given by:$

A.

B.

C.

D.

16 $Which combinational circuit is known as a 'Universal Logic Circuit' because it can implement any Boolean function?$

A.

Half Adder

B.

Multiplexer

C.

Decoder

D.

Encoder

17 $To implement a 16:1 Multiplexer using 4:1 Multiplexers, how many 4:1 MUXs are required?$

A.

4

B.

5

C.

8

D.

16

18 $A De-multiplexer is a circuit with:$

A.

Many inputs and many outputs

B.

One input and one output

C.

Many inputs and one output

D.

One input and many outputs

19 $A 1:8 De-multiplexer requires how many select lines?$

A.

1

B.

2

C.

3

D.

8

20 $Which circuit performs the reverse operation of a Multiplexer?$

A.

Encoder

B.

De-multiplexer

C.

Decoder

D.

Comparator

21 $A Decoder with input lines has a maximum of how many output lines?$

A.

B.

C.

D.

22 $A 3-to-8 line decoder is active high. If the input is (), which output is active?$

A.

B.

C.

D.

23 $What is the main difference between a Decoder and a De-multiplexer?$

A.

A demux acts as a decoder with the data input acting as an Enable line

B.

A decoder has fewer outputs than inputs

C.

A decoder has a data input line, a demux does not

D.

There is no difference

24 $An Encoder is a combinational circuit that converts:$

A.

Data from one line to many lines

B.

Serial data to parallel data

C.

Active input signal into a coded binary output

D.

Binary information into non-binary form

25 $In a standard 8-to-3 Encoder, if inputs and are essentially high simultaneously, what is the problem called?$

A.

Ambiguity (invalid output)

B.

Race condition

C.

Propagation delay

D.

Fan-out limit

26 $A Priority Encoder resolves the issue of multiple active inputs by:$

A.

Shutting down the circuit

B.

Randomly selecting an input

C.

Encoding only the input with the highest assigned priority

D.

Encoding only the input with the lowest assigned priority

27 $A Decimal-to-BCD encoder has how many inputs and outputs?$

A.

4 inputs, 10 outputs

B.

8 inputs, 3 outputs

C.

10 inputs, 10 outputs

D.

10 inputs, 4 outputs

28 $Which logic gate is primarily used to check for equality () in a 1-bit Comparator?$

A.

XNOR

B.

AND

C.

XOR

D.

OR

29 $In a 1-bit magnitude comparator with inputs and, the logic expression for is:$

A.

B.

C.

D.

30 $In a 1-bit magnitude comparator with inputs and, the logic expression for is:$

A.

B.

C.

D.

31 $A 2-bit magnitude comparator compares two binary numbers () and (). How many outputs does it generally have?$

A.

1

B.

3

C.

4

D.

2

32 $For a 2-bit comparator (and), the condition for is:$

A.

B.

C.

OR

D.

AND

33 $If you need to subtract from using a Full Adder, what modification is needed?$

A.

Set to 0

B.

Invert and add 1

C.

Connect inputs directly

D.

Invert and set Carry Input () to 1

34 $Which of the following is NOT a combinational circuit?$

A.

Decoder

B.

Full Adder

C.

Multiplexer

D.

Flip-Flop

35 $In a 2:4 Decoder constructed using NAND gates (Active Low outputs), if the inputs are valid, how many outputs are LOW at any specific time?$

A.

0

B.

1

C.

2

D.

3

36 $Which circuit is commonly used to drive a Seven Segment Display?$

A.

Comparator

B.

Multiplexer

C.

Encoder

D.

Decoder

37 $How many NOT gates are required to build a 2:1 Multiplexer if basic gates (AND, OR, NOT) are used?$

A.

2

B.

1

C.

0

D.

3

38 $If a Full Adder has inputs, what are the outputs?$

A.

B.

C.

D.

39 $If a Half Subtractor has inputs and, what are the outputs?$

A.

B.

C.

D.

40 $What is the primary disadvantage of a Ripple Carry Adder?$

A.

It cannot perform subtraction

B.

It requires too many gates

C.

It consumes too much power

D.

High propagation delay

41 $To expand a 2-bit comparator to a 4-bit comparator, one effectively connects the outputs of the lower bits to the:$

A.

Input stage of the higher bits

B.

Cascading inputs of the higher bit comparator

C.

Output of the higher bits

D.

Power supply

42 $What is the relationship between the Enable input of a Decoder and the operation of the circuit?$

A.

It serves as the MSB of the input

B.

It selects the output line

C.

It inverts the output

D.

It determines if the circuit is active or disabled

43 $A keyboard encoder typically uses which type of encoding logic?$

A.

Sequential Encoding

B.

Ripple Encoding

C.

Priority Encoding

D.

Differential Encoding

44 $Which circuit allows a single data line to control multiple devices addressed by a select code?$

A.

Adder

B.

Encoder

C.

De-multiplexer

D.

Multiplexer

45 $The Look-Ahead Carry Adder is designed to overcome which limitation?$

A.

Complexity of Half Adders

B.

Power consumption of Full Adders

C.

Propagation delay of Ripple Carry Adders

D.

Number of inputs limited to 2

46 $In a 2-bit Comparator comparing and, when is true?$

A.

If OR (AND)

B.

If

C.

If AND

D.

If AND

47 $How many 2-input NAND gates are required to implement a Half Adder?$

A.

4

B.

5

C.

9

D.

3

48 $The inputs to a 2:4 Decoder are and . Which output corresponds to the minterm ?$

A.

B.

C.

D.

49 $If we connect the data inputs of a 4:1 MUX as:, what logic gate does this MUX simulate (Select lines A, B)?$

A.

NAND

B.

XOR

C.

OR

D.

AND

50 $A Full Subtractor logic circuit typically requires:$

A.

Two Half Subtractors and an AND gate

B.

Two Half Subtractors and an XOR gate

C.

Two Half Subtractors and an OR gate

D.

One Half Subtractor and one Half Adder

Unit 4: Introduction to Combinational Logic Circuits - Practice Quiz

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