Unit 3: Lithography

1. Introduction to Lithography

Lithography, in semiconductor manufacturing, is the process of transferring a geometric pattern from a mask (or reticle) to a light-sensitive chemical layer (photoresist) on a substrate (wafer). It is the most critical and complex step in integrated circuit (IC) fabrication, as it defines the size and placement of all components like transistors, capacitors, and interconnects. The minimum feature size that can be produced by a lithography process is a key determinant of the performance and density of an IC, directly relating to Moore's Law.

Key Components:

• Radiation Source: Provides the energy (e.g., light, electrons, X-rays) to expose the resist.
• Mask/Reticle: A plate with a patterned opaque layer (e.g., chrome) that defines the IC layout.
• Optical System: Lenses and mirrors that project and focus the image from the mask onto the wafer.
• Photoresist (Resist): A radiation-sensitive organic polymer coated on the wafer.
• Substrate: The silicon wafer with various thin films on its surface.

2. Basic Steps in Lithography

The standard photolithography process involves a sequence of well-defined steps to create a patterned resist layer, which then acts as a mask for subsequent etching or deposition processes.

1. Substrate Preparation & Cleaning:

   • The wafer is thoroughly cleaned to remove any particulate or organic contamination (e.g., using RCA clean).
   • Dehydration Bake: The wafer is baked at a high temperature (~150-200°C) to drive off any adsorbed moisture from its surface, which would otherwise interfere with resist adhesion.
   • Adhesion Promotion: A chemical adhesion promoter, most commonly Hexamethyldisilazane (HMDS), is applied in a vapor phase. HMDS makes the hydrophilic silicon dioxide surface hydrophobic, improving the adhesion of the organic photoresist.

2. Photoresist Coating (Spin Coating):

   • A precise amount of liquid photoresist is dispensed onto the center of the wafer.
   • The wafer is then rapidly accelerated to a high rotational speed (e.g., 3000-6000 rpm).
   • Centrifugal force spreads the resist evenly across the wafer surface. The final thickness is determined by the resist's viscosity and the final spin speed.
   • This process creates a uniform, thin film of photoresist, typically 0.5 to 1.5 µm thick.

3. Soft Bake (Prebake):

   • The coated wafer is heated on a hot plate (~90-110°C) for a short duration (30-60 seconds).
   • Purpose: To evaporate a significant portion of the solvent from the resist, making the film solid and less tacky. It also improves adhesion and uniformity.

4. Mask Alignment & Exposure:

   • The wafer is placed in the exposure tool (e.g., a stepper or scanner).
   • The mask (or reticle) is precisely aligned with the wafer, using alignment marks on both. This is critical for multi-layer devices to ensure each new layer aligns correctly with the previous ones.
   • The resist is exposed to radiation (typically UV light) through the mask. The radiation induces a chemical change in the resist.
   • Resist Types:
     • Positive Resist: The exposed areas become more soluble in the developer solution. The pattern on the wafer is the same as the pattern on the mask.
     • Negative Resist: The exposed areas undergo cross-linking and become less soluble in the developer. The pattern on the wafer is the inverse of the mask pattern.

5. Post-Exposure Bake (PEB):

   • Mainly required for Chemically Amplified Resists (CARs) used in modern DUV and EUV lithography.
   • The wafer is baked at a controlled temperature (~110-130°C).
   • Purpose: To drive the acid-catalyzed reaction initiated during exposure. A single photon generates a photo-acid molecule, which can then deprotect hundreds of polymer sites during the PEB, dramatically increasing the resist's sensitivity.

6. Development:

   • The wafer is exposed to a developer solution (typically a water-based alkaline solution like TMAH - Tetramethylammonium hydroxide).
   • For a positive resist, the exposed regions are dissolved away.
   • For a negative resist, the unexposed regions are dissolved away.
   • The wafer is then rinsed with deionized water and dried, leaving a patterned resist layer on the surface.

7. Hard Bake (Postbake):

   • The wafer is baked at a higher temperature (~120-150°C) than the soft bake.
   • Purpose: To drive out any remaining solvent and developer, and to further cross-link or harden the resist. This improves its thermal stability and chemical resistance for the subsequent etching process.

8. Pattern Inspection:

   • The patterned wafer is inspected using optical microscopy or a Scanning Electron Microscope (SEM).
   • Checks are made for defects (e.g., missing or extra patterns), alignment accuracy, and Critical Dimension (CD)—the width of the smallest feature.

9. Etching & Resist Stripping:

   • The patterned resist acts as a protective mask. The wafer is subjected to an etching process (wet or dry) that removes the underlying material (e.g., SiO₂, polysilicon, metal) only in the areas not covered by resist.
   • After etching, the remaining resist is removed (stripped or ashed), typically using a plasma process or strong solvents, leaving the patterned material on the wafer.

3. Lithography Techniques

a. Optical Lithography

This is the workhorse of the semiconductor industry. It uses light, primarily in the ultraviolet (UV) spectrum, for exposure.

• Principle: An image of the mask is projected through a high-quality lens system onto the photoresist-coated wafer.

• Resolution: The minimum feature size (R) is governed by the Rayleigh Criterion:

  R = k1 * (λ / NA)

  • λ (Lambda): Wavelength of the exposure light. Shorter wavelengths lead to better resolution.
  • NA (Numerical Aperture): The light-gathering ability of the projection lens. Higher NA leads to better resolution. NA = n * sin(α), where n is the refractive index of the medium between the lens and wafer.
  • k1: A process-dependent factor (typically between 0.25 and 0.8) related to resist technology, mask enhancements, and process control.
• Evolution of Light Sources:
  • g-line: 436 nm (Mercury lamp)
  • i-line: 365 nm (Mercury lamp)
  • Deep UV (DUV):
    • KrF (Krypton Fluoride): 248 nm (Excimer laser)
    • ArF (Argon Fluoride): 193 nm (Excimer laser)
  • Extreme UV (EUV): 13.5 nm (Laser-Produced Plasma)
• Resolution Enhancement Techniques (RETs): To push optical lithography beyond the limits of the Rayleigh criterion (i.e., to achieve smaller k1):
  • Immersion Lithography: A high-refractive-index liquid (purified water, n≈1.44) is placed between the final lens and the wafer. This increases the effective NA, improving resolution. Standard for 193nm ArF lithography.
  • Phase-Shift Masks (PSM): Introduce phase differences (e.g., 180°) in the light passing through adjacent features on the mask, creating destructive interference at the edges to sharpen the image.
  • Optical Proximity Correction (OPC): The mask pattern is intentionally distorted (e.g., adding "hammerheads" or "serifs") to compensate for optical diffraction effects, ensuring the printed pattern on the wafer is as close to the desired shape as possible.
• Extreme Ultraviolet (EUV) Lithography: The current state-of-the-art for advanced nodes (<7nm).
  • Source: High-power laser vaporizes tin droplets to create a plasma that emits 13.5 nm light.
  • Optics: EUV is absorbed by all materials, including glass and air. Therefore, the system must operate in a vacuum and use complex reflective mirrors with multi-layer coatings (e.g., Mo/Si Bragg reflectors) instead of refractive lenses.

b. Electron Beam (E-beam) Lithography

• Principle: A highly focused beam of electrons is scanned directly across the resist-coated wafer to write the pattern, similar to a CRT television. No mask is needed.
• Resolution: Extremely high resolution (can be <10 nm) due to the very small de Broglie wavelength of electrons.
• Advantages:
  • Maskless: Direct-write capability is ideal for prototyping, research, and custom ICs.
  • Very High Resolution: The primary method for manufacturing photomasks used in optical lithography.
• Disadvantages:
  • Low Throughput: It is a serial process (writing pixel by pixel), making it extremely slow and unsuitable for high-volume wafer manufacturing.
  • Proximity Effect: Electrons scatter within the resist and from the substrate, unintentionally exposing adjacent areas and degrading pattern fidelity. This requires complex dose correction calculations.
  • High Cost: E-beam tools are very expensive to purchase and maintain.

c. X-ray Lithography

• Principle: Uses a parallel beam of soft X-rays (λ ≈ 1 nm) to expose the resist through a mask. It is a 1:1 proximity printing technique.
• Source: Typically requires a synchrotron, a large and expensive particle accelerator, to generate sufficiently intense and collimated X-rays.
• Resolution: Excellent potential resolution due to the short wavelength.
• Advantages:
  • High resolution with a large depth of focus.
  • Less susceptible to diffraction and scattering effects compared to optical lithography.
  • Insensitive to dust particles (X-rays pass through them).
• Disadvantages:
  • Mask Fabrication: Extremely challenging. The mask consists of a heavy metal absorber (e.g., gold) on a very thin, X-ray transparent membrane (e.g., silicon nitride). These masks are fragile, difficult to make defect-free, and prone to distortion.
  • Source Cost: Synchrotrons are prohibitively expensive for commercial fabs.
  • 1X Printing: Any defect on the mask is printed 1:1 on the wafer.

d. Ion Beam Lithography

• Principle: Uses a focused beam of ions (e.g., Ga+, He+) to write a pattern on a resist or to directly mill (sputter) the substrate material.
• Resolution: High resolution, comparable to or better than E-beam lithography.
• Advantages:
  • Minimal Proximity Effect: Heavy ions scatter much less than electrons, resulting in sharper patterns.
  • Direct Milling: Can be used for maskless etching and deposition.
• Disadvantages:
  • Low Throughput: Even slower than E-beam lithography.
  • Substrate Damage: Ions can cause damage and unintentional implantation in the substrate.
• Applications: Primarily used for photomask repair (milling away excess chrome or depositing material to fix defects) and in Focused Ion Beam (FIB) systems for failure analysis and circuit editing.

4. Resists and Mask Preparation

Resists

• Photoresists (for Optical Lithography):

  • Components:
    1. Resin/Polymer: The main structural component (e.g., Novolac, PHS).
    2. Sensitizer/Photoactive Compound (PAC): A molecule that absorbs the radiation and initiates the chemical change (e.g., DNQ, PAG).
    3. Solvent: Keeps the resist in a liquid state for spin coating (e.g., PGMEA).
  • g-line/i-line Resists (e.g., DNQ-Novolac): A Novolac resin (soluble in developer) is mixed with a DNQ sensitizer (an inhibitor, making the mix insoluble). Upon exposure, DNQ is destroyed, and the exposed area becomes soluble. This is a classic positive resist.
  • DUV/EUV Resists (Chemically Amplified Resists - CARs):
    • Mechanism: The resin is initially insoluble. The PAC is a Photo-Acid Generator (PAG). Exposure to a DUV/EUV photon creates an acid molecule from the PAG. During the Post-Exposure Bake (PEB), this single acid molecule acts as a catalyst, triggering a cascade of de-protection reactions that make the surrounding polymer soluble in the developer.
    • Advantage: Very high sensitivity, as one photon can lead to many chemical events. This is essential for high-throughput DUV and low-power EUV sources.

• E-beam/Ion Beam Resists:

  • The mechanism relies on the high energy of particles breaking or forming chemical bonds.
  • PMMA (Poly(methyl methacrylate)): A classic high-resolution positive e-beam resist. The main polymer chains are broken (scission) by the electron beam, making the exposed regions more soluble.
  • HSQ (Hydrogen silsesquioxane): A common high-resolution negative e-beam resist. The beam induces cross-linking, making the exposed regions insoluble.

Mask Preparation

• Optical Lithography Masks (Reticles):

  • Substrate: Highly pure, flat, and thermally stable fused silica (quartz).
  • Absorber: A thin layer of opaque material, typically chromium (Cr).
  • Fabrication: The pattern is written onto a resist-coated mask blank using a high-precision E-beam lithography tool. The chrome is then etched, and the resist is stripped.
  • Pellicle: A thin, transparent polymer membrane stretched on a frame and mounted a few millimeters away from the mask surface. Any dust particles that land on the pellicle will be out of the focal plane and will not be printed on the wafer, thus preventing print defects.

• X-ray Masks:

  • Structure: Consists of a heavy metal absorber (high atomic number, e.g., Gold, Tungsten) patterned on a thin, low-atomic-number membrane that is transparent to X-rays (e.g., SiN, SiC, diamond).
  • Challenges: The 1:1 printing ratio means mask features must be the same size as wafer features. The thin membrane makes the mask extremely fragile and prone to thermal distortion.

5. Printing Techniques

a. Contact Printing

• Method: The mask is in direct physical contact with the resist-coated wafer during exposure.
• Merits:
  • Simple and inexpensive equipment.
  • Achieves high resolution (1:1 feature transfer), theoretically limited only by diffraction.
• Demerits:
  • High defect generation. Particles trapped between the mask and wafer can damage both.
  • Mask wears out quickly due to repeated contact.
  • Not used in modern high-volume IC manufacturing.

b. Proximity Printing

• Method: The mask is held a small, controlled distance (gap of 10-50 µm) above the wafer.
• Merits:
  • Eliminates mask damage and defect transfer associated with contact printing.
• Demerits:
  • Resolution is degraded due to Fresnel diffraction in the gap between the mask and wafer, causing the pattern edges to blur. Resolution is proportional to √(λg), where g is the gap size.

c. Projection Printing

• Method: A set of high-quality lenses is placed between the mask (called a reticle in this context) and the wafer. The lenses project a reduced image of the reticle onto the wafer. This is the universal standard in modern IC manufacturing.
• Merits:
  • High Resolution: The use of high-NA reduction lenses allows for printing features much smaller than the wavelength of light.
  • Mask Protection: Since the reticle and wafer are far apart, there is no risk of contact damage.
  • Demagnification (e.g., 4x or 5x): The image is reduced. This means features on the reticle can be 4x larger than on the wafer, making reticle fabrication easier and less sensitive to defects. A defect on the reticle is also reduced in size, potentially becoming insignificant.
• Types of Projection Systems:
  • Stepper: Exposes one entire field (die) on the wafer, then mechanically "steps" to the next field and repeats.
  • Scanner: Exposes only a narrow slit of the reticle at a time while synchronously moving the reticle and the wafer. This allows for imaging larger die sizes with better focus and dose control across the wafer. All modern advanced lithography tools are scanners.

6. Merits and Demerits of Lithographies (Summary)

7. Recent Trends in Lithography at Nano Regime

As feature sizes shrink below 20nm, conventional optical lithography faces fundamental physical limits. Several advanced techniques are used to continue Moore's Law.

• Multi-Patterning: A technique to achieve a finer pitch than a single lithography exposure can resolve.

  • Litho-Etch-Litho-Etch (LELE): A pattern is printed and etched. A second lithography and etch step then creates an interleaved pattern, effectively doubling the pattern density. The primary challenge is overlay error between the two exposures.
  • Self-Aligned Double/Quadruple Patterning (SADP/SAQP): A single litho step defines a "mandrel" pattern. A material is deposited over the mandrel, and then etched back to leave only sidewall spacers. The mandrel is then removed, leaving behind the spacers which have double the frequency of the original pattern. This is "self-aligned," avoiding overlay issues. The process can be repeated for 4x density (SAQP).

• Extreme Ultraviolet (EUV) Lithography: As discussed, this is the industry's primary solution for the most advanced nodes (7nm, 5nm, 3nm). By reducing the wavelength to 13.5 nm, it allows for single-exposure patterning of very dense features, simplifying the complex multi-patterning schemes.

• Directed Self-Assembly (DSA):

  • Principle: Uses the intrinsic property of block copolymers (BCPs) to spontaneously separate into ordered nano-sized domains (e.g., lines or cylinders).
  • Method: A guiding pattern is first created using traditional lithography (e.g., EUV). The BCP material is then coated over this pattern and annealed, causing it to self-assemble into a much denser pattern that follows the guide.
  • Potential: Can be used for "healing" defects and improving line-edge roughness. It's a complementary, not a replacement, technology.

• Nanoimprint Lithography (NIL):

  • Principle: A mechanical patterning process. A hard mold (template) with a nanoscale pattern is pressed into a soft, curable resist on the wafer. The resist is then hardened (e.g., by UV light), and the mold is removed.
  • Merits: Very high resolution (limited only by the mold), potentially low cost, and high throughput.
  • Challenges: Defectivity (particles between mold and wafer are a major issue), alignment (overlay), and mold wear. Primarily used in memory (NAND Flash) and other specialized applications.

8. Etching Techniques

Etching is the process of selectively removing material to transfer the pattern from the resist layer to the underlying substrate.

a. Wet Etching

• Process: The wafer is immersed in a liquid chemical bath (etchant) that dissolves the target material.
• Characteristics:
  • Isotropic: Etching proceeds at the same rate in all directions (horizontally and vertically). This leads to undercutting, where the etchant removes material underneath the resist mask.
  • Selectivity: Usually very high. The etchant can be chosen to react rapidly with the target material but very slowly with the resist mask and underlying layers.
• Examples:
  • Silicon Dioxide (SiO₂): Hydrofluoric acid (HF) or Buffered Oxide Etch (BOE).
  • Silicon Nitride (Si₃N₄): Hot phosphoric acid (H₃PO₄).
  • Silicon (Si): A mixture of Nitric Acid (HNO₃) and HF.
• Merits: Simple, low-cost equipment, high throughput, excellent selectivity.
• Demerits: Poor dimensional control due to undercutting. Unsuitable for defining small, high-aspect-ratio features in modern ICs.

b. Dry Etching (Plasma Etching)

• Process: Uses gases and a plasma (an ionized gas containing ions, electrons, and neutral reactive species) inside a vacuum chamber to remove material.
• Characteristics:
  • Anisotropic: Etching is highly directional, typically vertical. This is achieved by energetic ions from the plasma bombarding the wafer surface, enhancing the etch rate in the vertical direction. This allows for the creation of features with straight sidewalls and high aspect ratios.
  • Mechanism: A combination of physical sputtering (ion bombardment dislodging atoms) and chemical reaction (neutral reactive species forming volatile byproducts with the material).
• Types of Dry Etching Systems:
  • Plasma Etching (PE): Primarily chemical in nature. The wafer is placed on a grounded electrode, and the plasma has low ion energy. Can be isotropic.
  • Reactive Ion Etching (RIE): The most common method. The wafer is placed on the RF-powered electrode, which creates a DC self-bias. This accelerates positive ions toward the wafer, providing the physical component for an anisotropic etch. It's a balance of physical and chemical etching.
  • Deep Reactive Ion Etching (DRIE): Used to etch very deep, vertical trenches in silicon (e.g., for MEMS). The Bosch Process is a common DRIE technique that alternates between two steps:
    1. Etch Step: A fluorine-based plasma (e.g., SF₆) etches the silicon isotropically for a few seconds.
    2. Passivation Step: A fluorocarbon plasma (e.g., C₄F₈) deposits a Teflon-like protective polymer on all surfaces.
       The subsequent etch step's ion bombardment removes the polymer from the bottom of the trench but not the sidewalls, allowing the etch to proceed only downwards.
• Merits: Excellent anisotropic profile and critical dimension control, essential for nanoscale devices. Cleaner process (vacuum-based).
• Demerits: More complex and expensive equipment, lower selectivity than wet etching, potential for radiation damage to the device.