Unit 1: Electronic materials and Crystal growth

1.1 Introduction to Electronic Materials

Electronic materials are substances used in the fabrication of electronic devices, chosen for their specific electrical properties. The ability to precisely control these properties is the foundation of the entire semiconductor industry.

Classification of Materials by Electrical Resistivity

Materials are broadly classified into three categories based on their ability to conduct electricity, which is quantified by electrical resistivity (ρ) or its inverse, conductivity (σ).

• Conductors:

  • Description: Materials with very low resistivity (or high conductivity). They have a large number of free charge carriers (electrons) available for conduction. The valence and conduction bands overlap, meaning electrons can move freely with minimal applied energy.
  • Resistivity (ρ): Typically in the range of 10⁻⁸ to 10⁻⁶ Ω·m.
  • Examples: Metals like Copper (Cu), Aluminum (Al), Gold (Au), Silver (Ag).
  • Role in Semiconductors: Used for interconnects, wiring, and contact pads to connect different components on a chip.

• Insulators (Dielectrics):

  • Description: Materials with very high resistivity. They have a very large energy band gap (typically > 5 eV) between the valence and conduction bands. It is extremely difficult for electrons to be excited into the conduction band to carry current.
  • Resistivity (ρ): Typically > 10¹⁰ Ω·m.
  • Examples: Silicon Dioxide (SiO₂), Silicon Nitride (Si₃N₄), Diamond, Glass.
  • Role in Semiconductors: Used to isolate conductive regions from each other (e.g., gate oxide in a MOSFET), as passivation layers, and as dielectrics in capacitors.

• Semiconductors:

  • Description: Materials with intermediate resistivity that can be precisely controlled. They have a moderate band gap (typically 0.5 to 3 eV). At 0K, they behave like insulators. At room temperature, some electrons gain enough thermal energy to jump to the conduction band, allowing for limited conductivity. Their conductivity can be dramatically altered by introducing impurities (doping).
  • Resistivity (ρ): Typically in the range of 10⁻⁵ to 10⁸ Ω·m.
  • Examples:
    • Elemental: Silicon (Si), Germanium (Ge).
    • Compound: Gallium Arsenide (GaAs), Indium Phosphide (InP), Gallium Nitride (GaN).
  • Role in Semiconductors: They are the active materials in which transistors, diodes, and integrated circuits are built.

1.2 Electrical Conductivity

Conductivity (σ) is a measure of a material's ability to conduct electric current.
Resistivity (ρ) is the inverse of conductivity (ρ = 1/σ) and measures the material's opposition to current flow.

The conductivity of a material is determined by two factors:

1. The number of available charge carriers per unit volume (n).
2. How easily these carriers can move through the material, known as mobility (μ).

The formula for conductivity is:
σ = n * q * μ
Where:

• σ = electrical conductivity (Siemens/m or (Ω·m)⁻¹)
• n = concentration of charge carriers (carriers/m³)
• q = elementary charge (1.602 x 10⁻¹⁹ C)
• μ = carrier mobility (m²/(V·s))

In semiconductors, there are two types of charge carriers:

• Electrons: Negatively charged carriers in the conduction band.
• Holes: Positively charged "vacancies" left behind in the valence band when an electron is excited.

Therefore, the total conductivity in a semiconductor is the sum of the contributions from both electrons and holes:
σ = (n * q * μ_e) + (p * q * μ_h)
Where:

• n = electron concentration
• p = hole concentration
• μ_e = electron mobility
• μ_h = hole mobility

1.3 Direct & Indirect Band Semiconductors

The concept of the energy band gap (E_g) is crucial. It is the energy difference between the top of the valence band and the bottom of the conduction band. The nature of this band gap determines the material's optical properties.

In a crystal lattice, an electron's energy (E) is a function of its momentum, which is related to its crystal momentum vector (k). An E-k diagram plots the electron energy versus its momentum.

Direct Band Gap Semiconductors

• Definition: A semiconductor in which the minimum energy level of the conduction band and the maximum energy level of the valence band occur at the same crystal momentum (k) value.
• Recombination Process: When an electron in the conduction band recombines with a hole in the valence band, it can drop directly down in energy. This transition conserves momentum, and the energy lost (E_g) is efficiently released as a photon (light).
• Significance: This property makes them ideal for optoelectronic devices that emit light.
• Applications: Light Emitting Diodes (LEDs), laser diodes, solar cells.
• Examples: Gallium Arsenide (GaAs), Indium Phosphide (InP), Gallium Nitride (GaN).

Indirect Band Gap Semiconductors

• Definition: A semiconductor in which the minimum of the conduction band and the maximum of the valence band occur at different crystal momentum (k) values.
• Recombination Process: For an electron to recombine with a hole, it must change both its energy and its momentum. Since a photon has negligible momentum, this transition cannot happen directly. The change in momentum must be conserved through interaction with a phonon (a quantum of lattice vibration).
• Significance: Recombination is a two-step, less probable process. The energy is primarily released as heat (through the phonon) rather than light. They are very poor light emitters.
• Applications: The dominant materials for transistors, logic circuits, and microprocessors (e.g., CMOS technology) due to other superior properties like the stable native oxide (SiO₂) of silicon.
• Examples: Silicon (Si), Germanium (Ge), Aluminum Arsenide (AlAs).

1.4 Source of Silicon

Silicon (Si) is the second most abundant element in the Earth's crust (after oxygen), making up about 28% of its mass. It does not occur naturally in its pure elemental form but is almost always found combined with oxygen.

• Primary Source: Silicon Dioxide (SiO₂) or Silica.
• Common Forms:
  • Quartzite: A hard, metamorphic rock. This is the primary raw material for silicon production.
  • Sand: Granular material composed of finely divided rock and mineral particles, with silica being the main constituent.
• Abundance & Cost: The vast availability of high-quality quartzite and sand makes silicon an economically viable and scalable material for the electronics industry.

1.5 Single Crystalline and Poly Crystalline

The arrangement of atoms in a solid material dictates its properties. For semiconductors, this atomic order is paramount.

Single Crystalline Silicon

• Definition: A material in which the crystal lattice is a continuous, unbroken arrangement of atoms extending throughout the entire sample. All atoms are oriented in the same way.
• Properties:
  • Anisotropic: Physical and electrical properties (e.g., carrier mobility, etch rate) can vary depending on the direction (crystal orientation).
  • No Grain Boundaries: The absence of grain boundaries allows charge carriers (electrons and holes) to move with minimal scattering and trapping.
• Importance: Essential for high-performance electronic devices. The predictable, uniform structure ensures consistent and reliable device performance across the entire wafer. All modern integrated circuits are built on single-crystal silicon wafers.

Polycrystalline Silicon (Polysilicon)

• Definition: A material composed of many small, randomly oriented single crystals, called grains or crystallites. The interface between these grains is called a grain boundary.
• Properties:
  • Isotropic: On a macroscopic scale, properties are generally the same in all directions due to the random orientation of the grains.
  • Grain Boundaries: These boundaries are disordered regions that act as obstacles to charge carrier flow, increasing resistivity. They also serve as trapping sites for carriers and collection points for impurities, which can degrade device performance.
• Applications:
  • Raw Material: It is the purified intermediate product (EGS) used to grow single-crystal silicon.
  • Gate Material: Heavily doped polysilicon is used as the gate electrode in MOSFETs.
  • Other uses: Used in some solar cells, thin-film transistors (TFTs), and as a structural material in MEMS.

1.6 Electronics Grade Silicon (EGS) Production

The process of converting raw quartzite (SiO₂) into ultra-pure polysilicon (99.999999999% pure, or "eleven nines") suitable for single-crystal growth involves several key steps.

Step 1: Production of Metallurgical Grade Silicon (MGS)

• Process: Quartzite (SiO₂) is heated with a carbon source (coke, coal, wood chips) in a submerged-electrode arc furnace at very high temperatures (~2000°C).
• Chemical Reaction: SiO₂ (solid) + 2C (solid) → Si (liquid) + 2CO (gas)
• Product: Metallurgical Grade Silicon (MGS).
• Purity: ~98-99% pure. Impurities include iron, aluminum, and carbon. This is suitable for the metallurgical industry (e.g., creating aluminum alloys) but is far too impure for electronics.

Step 2: Conversion to Trichlorosilane (TCS)

• Process: The solid MGS is first pulverized into a fine powder. This powder is then placed in a fluidized bed reactor and reacted with anhydrous Hydrogen Chloride (HCl) gas at ~300°C.
• Chemical Reaction: Si (solid) + 3HCl (gas) → SiHCl₃ (gas) + H₂ (gas)
• Product: Trichlorosilane (SiHCl₃), which is a liquid at room temperature with a boiling point of 31.8°C. This step is crucial because it converts the solid, impure silicon into a volatile liquid compound that can be purified by distillation.

Step 3: Purification by Fractional Distillation

• Process: The liquid Trichlorosilane is purified using fractional distillation. This process separates compounds based on their different boiling points.
• Mechanism: The TCS is repeatedly boiled and condensed. Impurity chlorides (e.g., BCl₃, PCl₃, FeCl₃) have different boiling points from SiHCl₃ and are thus separated out. This is a highly effective step that removes most metallic and dopant impurities.

Step 4: The Siemens Process (Chemical Vapor Deposition)

• Process: The highly purified SiHCl₃ gas is mixed with hydrogen (H₂) gas and introduced into a reactor containing thin, heated silicon rods (called "slim rods").
• Temperature: The slim rods are resistively heated to ~1150°C.
• Chemical Reaction (Decomposition): SiHCl₃ (gas) + H₂ (gas) → Si (solid) + 3HCl (gas)
• Product: The reaction causes ultra-pure elemental silicon to deposit and grow on the surface of the slim rods, forming large, high-purity polycrystalline rods. This product is called Electronics Grade Silicon (EGS) or Polysilicon.
• Purity: Exceeds 99.999999999% (1 part per billion impurity level).

1.7 Crystal Growth Techniques

The goal of these techniques is to convert the chunks of polycrystalline EGS into a large, perfect single-crystal cylinder called an ingot or boule.

Czochralski (CZ) Method

This is the most common method used for producing silicon wafers for integrated circuits.

• Process:
  1. Melting: Chunks of EGS are placed in a quartz (SiO₂) crucible and melted in a furnace at a temperature just above silicon's melting point (1414°C). A controlled amount of dopant (e.g., Boron for p-type, Phosphorus for n-type) is added to the melt to achieve the desired resistivity.
  2. Seeding: A small, perfectly oriented single-crystal seed is lowered to touch the surface of the molten silicon.
  3. Pulling & Rotation: The seed is slowly pulled upwards (e.g., a few mm/minute) while being rotated. The crucible is typically rotated in the opposite direction.
  4. Growth: As the seed is lifted, the molten silicon solidifies at the seed-melt interface, replicating the crystal structure of the seed. The rotation helps maintain a cylindrical shape and uniform temperature distribution.
  5. Diameter Control: The pull rate and temperature are precisely controlled to grow the ingot to the desired diameter (e.g., 200mm, 300mm).
• Advantages:
  • Relatively low cost and high throughput.
  • Capable of producing very large diameter ingots.
• Disadvantages:
  • Impurity Contamination: The molten silicon is highly reactive and dissolves some of the quartz crucible, introducing oxygen into the crystal. The graphite furnace components can introduce carbon. These impurities are unavoidable in the CZ process.

Float Zone (FZ) Method

This method is used when extremely high purity is required, exceeding that of the CZ method.

• Process:
  1. A high-purity polycrystalline rod is held vertically. A seed crystal is placed at the bottom.
  2. A radio-frequency (RF) induction coil surrounds the rod but does not touch it.
  3. The RF coil is energized, creating a narrow molten zone in the rod. Surface tension holds this molten zone in place.
  4. The coil is slowly moved upwards (or the rod downwards). As the coil moves, the molten zone travels along the length of the rod.
  5. Purification: Most impurities are more soluble in the liquid melt than in the solid crystal. As the molten zone moves, it "sweeps" these impurities along with it, concentrating them at the tang end of the rod, which is later cut off.
  6. Crystallization: The material behind the moving zone solidifies, taking on the crystal structure of the seed.
• Advantages:
  • Very High Purity: No crucible is used, eliminating oxygen and carbon contamination. FZ silicon is significantly purer than CZ silicon.
• Disadvantages:
  • More expensive and complex process.
  • Mechanical stability is an issue; it is difficult to grow large-diameter (>150mm) ingots due to surface tension limitations.
• Applications: High-power devices, detectors, and some solar cells where high resistivity and carrier lifetime are critical.

Bridgeman Method

While less common for silicon, this method is very important for growing compound semiconductors like GaAs.

• Process:
  1. Polycrystalline source material and a seed crystal are placed in a crucible (often boat-shaped and made of quartz or pyrolytic boron nitride).
  2. The crucible is sealed, often with an additional source of the more volatile element (e.g., Arsenic for GaAs) to maintain stoichiometry.
  3. The crucible is placed in a two-zone furnace with a sharp temperature gradient. One zone is above the melting point, the other is below.
  4. The crucible is slowly moved from the hot zone to the cold zone.
  5. Solidification begins at the seed crystal and progressively moves through the melt, forming a single-crystal ingot.
• Advantages:
  • Good control over crystal shape.
  • Excellent for materials with volatile components because it's a sealed system.

1.8 Silicon Wafer Preparation

The single-crystal ingot (boule) must be processed into thin, polished discs called wafers before it can be used for device fabrication.

1. Ingot Trimming and Grinding:

   • The seed (top) and tang (bottom) ends of the boule are cut off.
   • The entire ingot is then ground down using a lathe-like grinder to achieve a precise, uniform diameter (e.g., 300.00 ± 0.05 mm).

2. Flats or Notch Grinding:

   • A reference plane is ground along the length of the ingot.
   • Flats: For smaller wafers (<200mm), a long primary flat indicates a specific crystal orientation (e.g., <110>). A smaller secondary flat indicates the orientation and doping type (p-type or n-type).
   • Notch: For larger wafers (≥200mm), a small V-shaped notch is used instead of a flat. This saves silicon real estate and reduces stress.

3. Slicing:

   • The ground ingot is mounted and sliced into individual wafers using a high-precision saw.
   • Inner Diameter (ID) Saw: A thin, tensioned steel blade with diamond particles on its inner edge slices one wafer at a time.
   • Wire Saw: A long steel wire carrying an abrasive slurry of silicon carbide is used to slice the entire ingot into hundreds of wafers simultaneously. This is the dominant method today.

4. Edge Rounding (Contouring):

   • The sharp edges of the sliced wafer are ground to a smooth, rounded profile. This prevents chipping and cracking during automated handling in the fabrication facility (fab).

5. Lapping:

   • Wafers are placed between two large rotating plates in a slurry of alumina or silicon carbide. This process removes saw marks and surface damage, resulting in highly flat and parallel surfaces.

6. Etching:

   • The wafers are chemically etched using a mixture of acids (typically hydrofluoric acid (HF) and nitric acid (HNO₃)). This step removes the subsurface layer of crystal damage created by mechanical processes like sawing and lapping.

7. Polishing (Chemical Mechanical Planarization - CMP):

   • This is the final and most critical step to create a pristine surface.
   • Only one side of the wafer (the "front side") is polished to a mirror finish.
   • The wafer is mounted on a carrier and pressed against a rotating polishing pad wetted with a chemical slurry (e.g., colloidal silica particles in a basic solution like KOH).
   • The process involves both chemical action (the slurry reacts with and softens the silicon surface) and mechanical action (the abrasive particles wipe away the softened material).
   • The result is an ultra-flat, smooth, and damage-free surface ready for lithography and other fabrication steps.

8. Cleaning and Inspection:

   • The finished wafers undergo a series of rigorous cleaning steps (e.g., RCA clean) to remove any remaining slurry, organic residues, and metallic contaminants.
   • They are then inspected for flatness, surface particles, crystal defects, and resistivity before being packaged and shipped to a fab.