Unit5 - Subjective Questions

Barkhausen Criterion defines the essential conditions for a circuit to generate sustained, undamped oscillations. For an oscillator constructed with an amplifier of gain and a feedback network of gain , the conditions are:

1. Magnitude Condition: The overall loop gain must be equal to or greater than unity. Mathematically, for sustained oscillations. In practice, the initial loop gain is set to to build up the oscillations, and non-linearities reduce it to $1$ when amplitude stabilizes.
2. Phase Condition: The total phase shift around the closed loop must be or (or an integer multiple of ). This ensures that the feedback signal is exactly in phase with the input signal, creating positive feedback.

Without these conditions, the oscillations will either die out exponentially (if ) or clip against the power supply rails (if continuously).

An RC Phase Shift Oscillator is a low-frequency (audio frequency) oscillator that uses a resistor-capacitor (RC) network to provide the necessary phase shift for positive feedback.

Working Principle:

• It typically consists of a single-stage inverting amplifier (like a Common Emitter BJT or an inverting Op-Amp), which inherently introduces a phase shift of .
• To satisfy the Barkhausen criterion of a total phase shift, the feedback network must provide an additional phase shift.
• This is achieved using a cascading network of three identical RC sections. Each RC section is designed to provide a phase shift of at the desired resonant frequency ().
• Only at one specific frequency will the total phase shift equal exactly , and at this frequency, the circuit will oscillate if the amplifier gain is sufficient to compensate for the attenuation in the RC network (typically requiring a gain of at least $29$).

Frequency Formula:
The frequency of sustained oscillations is given by:

Wien-Bridge Oscillator is a widely used low-frequency oscillator known for its high stability and low distortion.

Construction & Working:

• The feedback circuit is built using a Lead-Lag network (a series RC circuit combined with a parallel RC circuit), which acts as a band-pass filter.
• It uses a non-inverting amplifier, which provides a phase shift.
• At very low frequencies, the series capacitor acts as an open circuit (leading phase), and at very high frequencies, the parallel capacitor acts as a short circuit (lagging phase).
• At the resonant frequency (), the phase shift introduced by the Wien bridge is exactly , satisfying the Barkhausen phase condition.

Frequency Formula:

Required Gain:
At the resonant frequency, the feedback fraction (attenuation of the Wien bridge) is exactly . To satisfy the Barkhausen magnitude condition (), the non-inverting amplifier must have a voltage gain of exactly .

Let the feedback network consist of a series RC combination () and a parallel RC combination ().

The feedback fraction is given by the voltage divider rule:

Substituting and :

Phase Condition:
For phase shift, the imaginary part of the denominator must be zero:

Thus, the frequency of oscillation is:

Magnitude Condition:
At , the imaginary part is $0$, so .
For , the amplifier gain must be:

Hartley Oscillator is a high-frequency LC oscillator used in radio-frequency applications.

(Note: A descriptive diagram interpretation is provided)
Circuit Construction:

• The tank circuit (tuned circuit) consists of two inductors ( and ) connected in series (or a single tapped inductor) and a single capacitor () connected in parallel across them.
• The center tap between and is typically grounded.
• The amplifier can be a BJT, FET, or Op-Amp configured in an inverting mode.

Operation:

• The amplifier produces a phase shift.
• The tapped LC tank circuit provides an additional phase shift because the voltage across (connected to input) and (connected to output) are out of phase relative to the grounded center tap.
• When power is applied, noise initiates oscillations in the tank circuit. The resonant frequency filters out other frequencies, and positive feedback sustains the oscillation.

Resonant Frequency:

Colpitts Oscillator is an LC oscillator similar to the Hartley oscillator but uses a different tank circuit arrangement to achieve better frequency stability at high frequencies.

Working & Description:

• The tank circuit consists of a single inductor () in parallel with two series capacitors ( and ).
• The junction between the two capacitors is grounded, acting as a center tap.
• The amplifier (e.g., Common Emitter BJT) provides a phase shift.
• The tapped capacitors provide the remaining phase shift. The voltage across is fed back to the input, and it is out of phase with the voltage across (the output).
• Oscillation frequency depends on the tank circuit resonance.

Resonant Frequency:

Difference from Hartley:

1. Tank Circuit: Colpitts uses a tapped capacitor (two capacitors, one inductor); Hartley uses a tapped inductor (two inductors, one capacitor).
2. Frequency Stability: Colpitts offers better frequency stability at high frequencies compared to Hartley, making it more common in RF circuits.

Comparison between RC and LC Oscillators:

The IC 555 Timer is a highly versatile integrated circuit used for timing and pulse generation. Its internal architecture consists of the following key blocks:

1. Voltage Divider Network: Comprises three equal resistors connected in series between and Ground. It establishes two internal reference voltages: and .
2. Comparators:
   • Threshold Comparator (Upper): Compares the voltage at the Threshold pin (Pin 6) with . Outputs HIGH if Pin 6 .
   • Trigger Comparator (Lower): Compares the voltage at the Trigger pin (Pin 2) with . Outputs HIGH if Pin 2 .
3. SR Flip-Flop: Stores the state of the timer. The Trigger comparator sets (S) the flip-flop, and the Threshold comparator resets (R) it.
4. Discharge Transistor (Q1): An NPN transistor driven by the inverted output of the flip-flop. When the flip-flop is reset, Q1 turns ON, providing a low-resistance path to ground for discharging an external capacitor connected to Pin 7.
5. Output Stage: A power amplifier/buffer that provides a robust output signal at Pin 3 (can source or sink up to 200mA).

The standard 8-pin dual-in-line package (DIP) 555 timer has the following pinouts:

1. Ground (GND - Pin 1): Reference ground for the circuit.
2. Trigger (Pin 2): A negative-going pulse on this pin (dropping below ) sets the internal flip-flop, driving the output HIGH and starting the timing cycle.
3. Output (Pin 3): The primary output pin of the timer. It can either sink or source current up to 200mA.
4. Reset (Pin 4): An active-low input that immediately resets the timer, forcing the output LOW regardless of other pin states. Usually tied to when not used.
5. Control Voltage (Pin 5): Allows external adjustment of the internal threshold voltages (). Usually connected to ground via a capacitor to prevent noise if unused.
6. Threshold (Pin 6): When the voltage here exceeds , the internal flip-flop resets, driving the output LOW and ending the timing cycle.
7. Discharge (Pin 7): Connected to the open collector of the internal discharge transistor. It is used to discharge the external timing capacitor when the output is LOW.
8. Supply Voltage ( - Pin 8): Positive power supply terminal, typically operating between and .

A Monostable Multivibrator (One-Shot) has one stable state (typically LOW) and one quasi-stable state (HIGH).

Operation with 555 Timer:

• Circuit Setup: An external resistor () is connected between and Pin 7. A capacitor () is connected between Pin 7 and ground. Pin 6 (Threshold) is tied to Pin 7. Pin 2 (Trigger) receives the input pulse.
• Stable State: The output is LOW. The internal discharge transistor is ON, keeping the capacitor shorted to ground ().
• Triggering: When a negative-going trigger pulse drops below at Pin 2, the lower comparator sets the flip-flop. The output goes HIGH, and the discharge transistor turns OFF.
• Charging Phase (Quasi-Stable State): The capacitor now charges exponentially towards through resistor .
• Return to Stable State: When the capacitor voltage reaches , the upper threshold comparator resets the flip-flop. The output goes LOW, the discharge transistor turns ON, and the capacitor instantly discharges to .
• Pulse Width: The duration of the HIGH output state depends entirely on the external RC components and is given by .

In a 555 timer monostable multivibrator, the timing capacitor charges through resistor towards the supply voltage starting from .

The general equation for the voltage across a charging capacitor is:

Here:

• Initial voltage,
• Final target voltage,

Substituting these values:

The timing interval ends when the capacitor voltage reaches the threshold voltage, which is internally set to . Therefore, at , .

Substituting this into the equation:

An Astable Multivibrator has no stable states and continuously toggles between HIGH and LOW, producing a square wave without external triggering.

Working with 555 Timer:

• Circuit Setup: Uses two resistors ( and ) and a capacitor (). is between and Pin 7. is between Pin 7 and Pin 6. Pin 6 (Threshold) and Pin 2 (Trigger) are tied together to the capacitor, enabling self-triggering.
• Charging (HIGH state): When output is HIGH, the discharge transistor is OFF. Capacitor charges towards through both and . When reaches , the threshold comparator resets the flip-flop.
• Discharging (LOW state): The output goes LOW, turning ON the discharge transistor at Pin 7. The capacitor now discharges to ground exclusively through and Pin 7. When drops to , the trigger comparator sets the flip-flop again, and the cycle repeats.

Time Period Expressions:

• Time HIGH (): Time taken to charge from to through .
  
• Time LOW (): Time taken to discharge from to through .
  
• Total Time Period ():
  

Duty Cycle Formula:
Duty Cycle is the ratio of the time the output is HIGH to the total time period, expressed as a percentage.

For a standard 555 astable circuit:

Substituting these:

Achieving exactly 50% Duty Cycle:
To achieve a duty cycle, the charge time and discharge time must be equal (). This is done by adding a bypass diode in parallel with (anode at Pin 7, cathode at Pin 6/2).

• During charging, the diode is forward-biased, bypassing . The capacitor charges only through . So, .
• During discharging, the diode is reverse-biased, so the capacitor discharges normally through . So, .
• By choosing , we get , resulting in an exact duty cycle.

Voltage-Controlled Oscillator (VCO) is an electronic oscillator whose output frequency is linearly controlled by a DC input voltage.

Operating Principle:

• The frequency of oscillation, , is directly proportional to the control voltage, .
• This is typically achieved by using the control voltage to vary the charging and discharging current of a timing capacitor.
• Higher control voltage increases the charging current, causing the capacitor to reach its threshold faster, thus increasing the frequency. Lower voltage results in a lower frequency.
• ICs like NE566 are common examples, providing square and triangular wave outputs whose frequency can be adjusted via a control pin.

Primary Applications:

1. Phase-Locked Loops (PLL): Used as the adjustable frequency source in feedback loops.
2. Frequency Modulation (FM): The control voltage is the audio signal, producing an FM RF signal.
3. Tone Generators: In electronic music synthesizers to generate variable pitch.
4. Frequency Shift Keying (FSK): In digital communications for transmitting binary data.

Phase-Locked Loop (PLL) is a feedback system that locks the phase (and consequently the frequency) of an output oscillator to an input reference signal.

Block Diagram Components & Functions:

1. Phase Detector (Comparator):
   • Receives two signals: the external input signal () and the feedback signal from the VCO ().
   • Compares the phase difference between them and produces a proportional error voltage. The output is a mix of DC and high-frequency components.
2. Low Pass Filter (LPF):
   • Takes the output from the phase detector and removes the high-frequency AC components.
   • Produces a smooth, steady DC voltage (control voltage) proportional to the phase difference.
3. Error Amplifier:
   • Amplifies the DC control voltage from the LPF to ensure it has sufficient amplitude to drive the VCO over its necessary frequency range.
4. Voltage-Controlled Oscillator (VCO):
   • Generates an output frequency () determined by the DC control voltage.
   • When locked, the control voltage adjusts the VCO so that exactly equals with a constant phase offset.

In the context of Phase-Locked Loops (PLL):

1. Lock Range (Tracking Range):

• It is the range of input frequencies over which the PLL can maintain a "locked" state once it has already locked onto the input signal.
• If the input frequency slowly drifts, the VCO will track it as long as the frequency remains within the lock range.
• It is generally determined by the maximum output frequency range of the VCO.

2. Capture Range (Acquisition Range):

• It is the range of input frequencies over which the PLL can initially acquire a lock from an unlocked state.
• If the PLL is unlocked and an input signal is applied, the PLL will only "capture" and lock onto the signal if its frequency falls within this narrower range.
• It depends largely on the bandwidth of the Low Pass Filter (LPF).

Relationship:
The capture range is always less than or equal to the lock range. A narrow LPF bandwidth improves noise rejection but reduces the capture range, while the lock range remains unaffected by LPF bandwidth.

Phase-Locked Loops (PLLs) are extremely versatile and are found in numerous communication and control applications:

1. FM Demodulation: If an FM signal is applied to the input, the PLL's VCO tracks the frequency variations. The DC control voltage produced by the Low Pass Filter matches the original modulating audio signal, effectively acting as an FM demodulator.
2. Frequency Synthesis and Multiplication: By placing a divide-by-N counter in the feedback loop between the VCO and the Phase Detector, the output frequency becomes . This is widely used in modern radios and microprocessors to generate high clock frequencies from a low-frequency crystal.
3. Frequency Translation: By combining a mixer and a low-pass filter within the loop, the PLL can shift an input frequency by a fixed offset.
4. Signal Recovery (AM Detection): Used to recover weak signals buried in noise by locking onto the exact carrier frequency.
5. Motor Speed Control: Used in precise motor speed controllers (like in hard disk drives), where the motor's rotational speed acts as the VCO.

Multivibrators are circuits used to implement a variety of simple two-state systems. They differ based on the number of stable states they possess:

1. Astable Multivibrator:

   • Stable States: Zero.
   • Operation: Continuously transitions back and forth between two quasi-stable states without any external trigger.
   • Application: Used as a free-running oscillator or clock pulse generator (e.g., generating square waves).

2. Monostable Multivibrator (One-Shot):

   • Stable States: One (usually LOW).
   • Operation: Remains in its stable state until an external trigger is applied. Upon triggering, it shifts to a quasi-stable state (HIGH) for a predetermined duration (determined by an RC time constant) before automatically returning to the stable state.
   • Application: Used for pulse stretching, debouncing switches, and time-delay circuits.

3. Bistable Multivibrator (Flip-Flop):

   • Stable States: Two (HIGH and LOW).
   • Operation: Remains in its current state indefinitely until an external trigger pulse forces it to switch to the other state. It requires a trigger for every state change.
   • Application: Used as basic memory elements, latches, and counters in digital logic.

While oscillators are built using amplifiers, their fundamental operation is distinct. The key differences are:

Frequency Stability is the ability of an oscillator to maintain a constant output frequency over a long period despite environmental and operational changes.

Factors Affecting Frequency Stability:

1. Temperature Variations: Changes in temperature affect the values of the passive components (Resistors, Inductors, Capacitors) in the tank/feedback circuit, thereby shifting the frequency.
2. Power Supply Fluctuations: Variations in the DC supply voltage () can change the inter-electrode capacitances of the active device (BJT/FET), shifting the frequency.
3. Load Variations: Connecting a variable load can draw varying current, loading the oscillator circuit and pulling the frequency away from resonance.
4. Aging: Components naturally degrade and change values over years of operation.

Methods to Improve Stability:

1. Use of Crystal Oscillators (Piezoelectric quartz), which have incredibly high Q-factors and are practically immune to minor temperature and voltage variations.
2. Using highly regulated DC power supplies.
3. Isolating the oscillator from the load by placing a Buffer Amplifier in between, so load variations do not affect the tank circuit.
4. Using temperature-compensated components or enclosing the oscillator in a constant-temperature oven (OCXO).