Unit 4 - Practice Quiz

ECE249 50 Questions
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1 Which of the following is a characteristic of a combinational logic circuit?

A. Its output depends on the present input as well as past outputs
B. It has memory elements to store data
C. It requires a clock signal to operate
D. Its output depends only on the present inputs

2 What are the outputs of a Half Adder?

A. Sum and Difference
B. Quotient and Remainder
C. Sum and Carry
D. Difference and Borrow

3 The logic equation for the Sum output of a Half Adder with inputs and is:

A.
B.
C.
D.

4 The logic equation for the Carry output of a Half Adder with inputs and is:

A.
B.
C.
D.

5 How many inputs does a Full Adder have?

A. 4
B. 3
C. 2
D. 1

6 A Full Adder can be implemented using:

A. Two Half Adders and one AND gate
B. One Half Adder and two OR gates
C. Two OR gates and two AND gates
D. Two Half Adders and one OR gate

7 What is the Boolean expression for the Sum () of a Full Adder with inputs ?

A.
B.
C.
D.

8 The Carry output () of a Full Adder is 1 when:

A. Two or more inputs are high
B. Only the carry input is high
C. Only one input is high
D. All inputs are low

9 Which logic gate is exclusively used to determine the Difference in a Half Subtractor?

A. AND gate
B. XOR gate
C. OR gate
D. NAND gate

10 The Boolean expression for the Borrow output () of a Half Subtractor (computing ) is:

A.
B.
C.
D.

11 How many outputs does a Full Subtractor have?

A. 3
B. 2
C. 4
D. 1

12 In a 4-bit parallel adder (Ripple Carry Adder), the carry output of the second full adder is connected to:

A. The carry input of the first full adder
B. The sum input of the third full adder
C. The carry input of the third full adder
D. The output of the fourth full adder

13 A Multiplexer (MUX) is also known as a:

A. Data Distributor
B. Encoder
C. Data Selector
D. Decoder

14 A 4:1 Multiplexer has 4 data inputs. How many select lines does it require?

A. 4
B. 2
C. 3
D. 1

15 The output of a 2:1 Multiplexer with inputs and select line is given by:

A.
B.
C.
D.

16 Which combinational circuit is known as a 'Universal Logic Circuit' because it can implement any Boolean function?

A. Encoder
B. Half Adder
C. Multiplexer
D. Decoder

17 To implement a 16:1 Multiplexer using 4:1 Multiplexers, how many 4:1 MUXs are required?

A. 4
B. 8
C. 5
D. 16

18 A De-multiplexer is a circuit with:

A. One input and many outputs
B. Many inputs and many outputs
C. One input and one output
D. Many inputs and one output

19 A 1:8 De-multiplexer requires how many select lines?

A. 1
B. 8
C. 3
D. 2

20 Which circuit performs the reverse operation of a Multiplexer?

A. De-multiplexer
B. Encoder
C. Comparator
D. Decoder

21 A Decoder with input lines has a maximum of how many output lines?

A.
B.
C.
D.

22 A 3-to-8 line decoder is active high. If the input is (), which output is active?

A.
B.
C.
D.

23 What is the main difference between a Decoder and a De-multiplexer?

A. A decoder has fewer outputs than inputs
B. A demux acts as a decoder with the data input acting as an Enable line
C. There is no difference
D. A decoder has a data input line, a demux does not

24 An Encoder is a combinational circuit that converts:

A. Data from one line to many lines
B. Binary information into non-binary form
C. Serial data to parallel data
D. Active input signal into a coded binary output

25 In a standard 8-to-3 Encoder, if inputs and are essentially high simultaneously, what is the problem called?

A. Propagation delay
B. Ambiguity (invalid output)
C. Fan-out limit
D. Race condition

26 A Priority Encoder resolves the issue of multiple active inputs by:

A. Encoding only the input with the lowest assigned priority
B. Encoding only the input with the highest assigned priority
C. Shutting down the circuit
D. Randomly selecting an input

27 A Decimal-to-BCD encoder has how many inputs and outputs?

A. 8 inputs, 3 outputs
B. 10 inputs, 10 outputs
C. 4 inputs, 10 outputs
D. 10 inputs, 4 outputs

28 Which logic gate is primarily used to check for equality () in a 1-bit Comparator?

A. XNOR
B. AND
C. XOR
D. OR

29 In a 1-bit magnitude comparator with inputs and , the logic expression for is:

A.
B.
C.
D.

30 In a 1-bit magnitude comparator with inputs and , the logic expression for is:

A.
B.
C.
D.

31 A 2-bit magnitude comparator compares two binary numbers () and (). How many outputs does it generally have?

A. 2
B. 3
C. 1
D. 4

32 For a 2-bit comparator ( and ), the condition for is:

A.
B. AND
C. OR
D.

33 If you need to subtract from using a Full Adder, what modification is needed?

A. Connect inputs directly
B. Invert and set Carry Input () to 1
C. Set to 0
D. Invert and add 1

34 Which of the following is NOT a combinational circuit?

A. Full Adder
B. Flip-Flop
C. Multiplexer
D. Decoder

35 In a 2:4 Decoder constructed using NAND gates (Active Low outputs), if the inputs are valid, how many outputs are LOW at any specific time?

A. 0
B. 1
C. 3
D. 2

36 Which circuit is commonly used to drive a Seven Segment Display?

A. Decoder
B. Multiplexer
C. Encoder
D. Comparator

37 How many NOT gates are required to build a 2:1 Multiplexer if basic gates (AND, OR, NOT) are used?

A. 1
B. 3
C. 0
D. 2

38 If a Full Adder has inputs , what are the outputs?

A.
B.
C.
D.

39 If a Half Subtractor has inputs and , what are the outputs?

A.
B.
C.
D.

40 What is the primary disadvantage of a Ripple Carry Adder?

A. It requires too many gates
B. It consumes too much power
C. It cannot perform subtraction
D. High propagation delay

41 To expand a 2-bit comparator to a 4-bit comparator, one effectively connects the outputs of the lower bits to the:

A. Power supply
B. Output of the higher bits
C. Input stage of the higher bits
D. Cascading inputs of the higher bit comparator

42 What is the relationship between the Enable input of a Decoder and the operation of the circuit?

A. It selects the output line
B. It serves as the MSB of the input
C. It determines if the circuit is active or disabled
D. It inverts the output

43 A keyboard encoder typically uses which type of encoding logic?

A. Ripple Encoding
B. Priority Encoding
C. Differential Encoding
D. Sequential Encoding

44 Which circuit allows a single data line to control multiple devices addressed by a select code?

A. Multiplexer
B. De-multiplexer
C. Encoder
D. Adder

45 The Look-Ahead Carry Adder is designed to overcome which limitation?

A. Complexity of Half Adders
B. Power consumption of Full Adders
C. Propagation delay of Ripple Carry Adders
D. Number of inputs limited to 2

46 In a 2-bit Comparator comparing and , when is true?

A. If AND
B. If AND
C. If OR ( AND )
D. If

47 How many 2-input NAND gates are required to implement a Half Adder?

A. 4
B. 3
C. 5
D. 9

48 The inputs to a 2:4 Decoder are and . Which output corresponds to the minterm ?

A.
B.
C.
D.

49 If we connect the data inputs of a 4:1 MUX as: , what logic gate does this MUX simulate (Select lines A, B)?

A. OR
B. XOR
C. NAND
D. AND

50 A Full Subtractor logic circuit typically requires:

A. One Half Subtractor and one Half Adder
B. Two Half Subtractors and an AND gate
C. Two Half Subtractors and an OR gate
D. Two Half Subtractors and an XOR gate