Unit 6: Active Filters and Wave Shaping Circuits

I. Orientation: Active Filters and the Op-Amp as Building Block

Active filters are frequency-selective networks built from resistors, capacitors and an op-amp; the op-amp supplies gain and buffering so that inductors, bulky and lossy at low frequencies, are never needed (post-1960s, following the availability of integrated op-amps).

• Definition: A circuit whose gain depends on the frequency of the input, passing a chosen band and attenuating the rest, using an active device (op-amp) plus RC networks.
• Active vs passive: Passive filters use only R, L, C and cannot give gain (attenuation always ≤ 1); active filters give gain > 1, high input impedance and low output impedance.
• Order: Set by the number of reactive (RC) sections; each order contributes a roll-off of 20 dB/decade (6 dB/octave).
• Cutoff frequency: The frequency at which gain falls to 0.707 (−3 dB) of the passband value; f_c = 1/(2πRC).
• Butterworth response: Maximally flat passband, no ripple, defining the family used throughout this unit.
• Symbols: A_F = passband gain, f = input frequency, f_c = cutoff frequency, R_F and R_1 = feedback and input resistors.

II. First Order Low Pass Butterworth Filter

Passes signals below the cutoff and attenuates those above it, using one RC stage feeding a non-inverting amplifier.

A. Circuit and transfer function

• Topology: Input passes through series R into shunt C; the capacitor voltage feeds the op-amp's non-inverting input; gain is set by R_F and R_1.
• Gain magnitude:
  
  TEXT

  |A| = A_F / sqrt(1 + (f/f_c)^2)
  A_F = 1 + R_F/R_1     f_c = 1/(2πRC)

• Behaviour: At f << f_c, |A| ≈ A_F; at f = f_c, |A| = 0.707 A_F; at f >> f_c, roll-off of −20 dB/decade.

B. Design note

• Worked value: For f_c = 1 kHz with C = 0.01 µF, R = 1/(2π·1000·0.01µ) ≈ 15.9 kΩ.

III. First Order High Pass Butterworth Filter

Passes signals above the cutoff and blocks those below, obtained by interchanging the R and C of the low pass design.

A. Circuit and transfer function

• Topology: Series capacitor blocks low frequencies; shunt resistor to ground; op-amp non-inverting gain stage follows.
• Gain magnitude:
  
  TEXT

  |A| = A_F (f/f_c) / sqrt(1 + (f/f_c)^2)

• Behaviour: At f << f_c the response rises at +20 dB/decade; at f = f_c, |A| = 0.707 A_F; at f >> f_c, |A| ≈ A_F (flat passband).

IV. Band Pass Filter

Passes a band of frequencies between a lower and an upper cutoff, rejecting all others.

A. Structure and parameters

• Cascade principle: A high pass section (cutoff f_L) followed by a low pass section (cutoff f_H) with f_L < f_H gives the passband.
• Bandwidth: BW = f_H − f_L.
• Centre frequency: f_r = sqrt(f_L · f_H).
• Quality factor: Q = f_r / BW; low Q (< 10) = wide band, high Q = narrow band (selective).
• Types:
  1. Wide band: Q < 10, made by cascading separate LP and HP stages.
  2. Narrow band: Q > 10, uses a single multiple-feedback op-amp stage with one input.

V. Band Reject Filter

Rejects a band of frequencies between two cutoffs while passing frequencies on either side; also called a band-stop or notch filter.

A. Structure and parameters

• Notch construction: A twin-T network (two T-sections of R and C) feeding an op-amp gives a sharp notch.
• Notch frequency: f_N = 1/(2πRC) — the frequency of maximum attenuation.
• Wide band type: LP and HP outputs (with f_L > f_H) summed together stop the intervening band.
• Application: Removing a single interfering tone such as 50 Hz mains hum from an instrumentation signal.

VI. All Pass Filter

Passes all frequencies with constant gain but introduces a controlled, frequency-dependent phase shift.

A. Principle and use

• Gain: |A| = 1 at every frequency (magnitude flat); only phase changes.
• Phase shift: φ = −2 arctan(2πfRC) for the lag configuration, sweeping from 0° to −180° as f rises.
• Purpose: Used as a phase equaliser / delay equaliser to correct phase distortion in transmission lines without altering amplitude.

VII. Square Wave Generator

Generates a square wave by repeatedly charging and discharging a capacitor across an op-amp comparator with hysteresis (an astable multivibrator).

A. Operation

• Feedback: Positive feedback via R_2, R_3 sets threshold β·V_sat, where β = R_2/(R_2+R_3); negative feedback via RC sets timing.
• Action: Output swings between +V_sat and −V_sat; the capacitor charges toward the current output until it crosses the threshold, flipping the output.
• Frequency:
  
  TEXT

  T = 2RC ln((1+β)/(1−β))     f = 1/T

• Anchor: With equal R_2 = R_3 (β = 0.5), T = 2RC ln 3 ≈ 2.2 RC.

VIII. Triangular Wave Generator

Produces a triangular wave by integrating the square wave, cascading a comparator with an integrator.

A. Operation

• Cascade: A square-wave (comparator) stage drives an op-amp integrator; the integrator's linear ramping output is fed back to the comparator.
• Waveform: Constant input to the integrator gives a linear ramp; alternating polarity produces up-and-down ramps forming a triangle.
• Peak amplitude: V_O(pp) = (R_2/R_3)(2 V_sat).
• Frequency: f = R_3 /(4 R_1 C R_2), set by the integrator time constant and comparator ratio.

IX. Sawtooth Wave Generator

Produces a ramp that rises slowly and falls quickly (or vice-versa), giving unequal rise and fall times unlike the symmetric triangle.

A. Operation

• Asymmetry: A potentiometer (or diode) at the integrator input makes the charging and discharging rates unequal, so one slope is steep and the other gradual.
• Contrast with triangle: Triangular wave has equal rise/fall slopes; sawtooth deliberately unbalances them.
• Application: The linear ramp provides the horizontal sweep (time base) in CRT displays and oscilloscopes.

X. Voltage Controlled Oscillator (VCO)

An oscillator whose output frequency is proportional to an applied control voltage.

A. Principle

• Definition: f_out = k · V_control, where k is the conversion gain in Hz/volt.
• Mechanism: The control voltage sets the charging current of a timing capacitor, so a larger voltage charges it faster and raises the frequency.
• Device: The IC 566 is a standard VCO whose free-running frequency is f_o = 2(V_+ − V_C)/(R_1 C_1 V_+).
• Application: Core of FM generation, PLLs and frequency-shift keying (FSK).

XI. IC 555 Timer

A versatile timing IC combining two comparators, an SR flip-flop, a discharge transistor and a resistive divider, used for delays and oscillation.

A. 555 timer pin configuration

• Pin 1 – Ground: Common negative supply.
• Pin 2 – Trigger: Sets output high when its voltage falls below V_CC/3.
• Pin 3 – Output: Delivers the timed high/low signal.
• Pin 4 – Reset: Active-low; forces output low when grounded.
• Pin 5 – Control voltage: Accesses the internal 2V_CC/3 reference to alter thresholds.
• Pin 6 – Threshold: Resets output low when its voltage rises above 2V_CC/3.
• Pin 7 – Discharge: Open-collector transistor that discharges the timing capacitor.
• Pin 8 – V_CC: Supply, typically +5 V to +15 V.

B. Operating modes

• Internal reference: Divider of three equal resistors fixes trigger level at V_CC/3 and threshold at 2V_CC/3.
  1. Monostable (one-shot): One stable state; a trigger produces a single pulse of width T = 1.1 R C, then returns low.
  2. Astable (free-running): No stable state; oscillates continuously with f = 1.44 /((R_A + 2R_B)C), giving a duty cycle set by R_A, R_B.
• Bistable mode: Trigger and reset pins toggle the output as a flip-flop (no timing capacitor).

XII. Recent Trends in Electronics

Modern practice moves the wave-shaping and filtering functions of this unit from discrete op-amps toward integrated, programmable and digital forms.

A. Directions of development

• Switched-capacitor filters: Replace resistors with rapidly switched capacitors, so cutoff is set by a clock frequency and the whole filter fits on-chip (e.g. MF10).
• DSP-based filtering: Analog signals are sampled and filtered in software (FIR/IIR algorithms), giving precise, reconfigurable responses without component drift.
• Direct Digital Synthesis (DDS): Generates square, triangle and sine waveforms digitally from a phase accumulator and lookup table, replacing analog function generators.
• Miniaturisation and integration: MEMS resonators, System-on-Chip designs and low-power CMOS bring filters, timers and oscillators into single mixed-signal ICs for portable and IoT devices.