Configuring Timer 0 in PIC18 for a precise time delay involves several steps:

• Set Timer 0 Mode: Determine if Timer 0 will operate as an 8-bit or 16-bit timer. This is typically done by setting the T08BIT bit in the T0CON register.
• Select Clock Source: Choose the clock source for Timer 0. For a time delay, the internal instruction clock (F_OSC/4) is usually selected by clearing the T0CS bit in T0CON.
• Configure Prescaler: If a prescaler is desired to extend the timer's range, enable it (PSA = 0) and select the appropriate prescale value (1:1 to 1:256) using the T0PS2:T0PS0 bits in T0CON.
• Load Initial Value: Calculate the initial count value to achieve the desired delay. This value is loaded into the TMR0H (high byte) and TMR0L (low byte) registers. The formula often used is Initial_Value = Max_Counts - Desired_Counts.
• Enable Timer 0: Start Timer 0 by setting the TMR0ON bit in the T0CON register.
• Wait for Overflow (or use Interrupts):
  • Polling: Continuously check the TMR0IF flag in the INTCON register. When it sets, the delay has elapsed.
  • Interrupts: Enable the Timer 0 overflow interrupt (TMR0IE in INTCON), global interrupts (GIEH and PEIE), and set up an Interrupt Service Routine (ISR) to handle the overflow.

Calculation of Initial Value:

1. Oscillator Frequency (F_OSC): 4 MHz
2. Instruction Cycle Frequency (F_CY):
3. Instruction Cycle Time (T_CY):
4. Prescaler Value: 1:8
5. Timer Clock Period:
6. Desired Delay: 10 ms =
7. Number of Counts:
8. Maximum 16-bit Timer Value:
9. Initial Timer Value (to count up to overflow):
10. Hexadecimal Value:
    • TMR0H = 0xFE
    • TMR0L = 0x3E

C Code Snippet:

c

include <xc.h>

void init_timer0_10ms_delay(void) {
// Configure Timer0
T0CON = 0x00; // Reset T0CON

// T0CON Register Setup:
// TMR0ON = 0 (Stop Timer0 for configuration)
// T08BIT = 0 (16-bit mode)
// T0CS   = 0 (Internal clock (Fosc/4))
// T0SE   = 0 (Ignored for internal clock)
// PSA    = 0 (Prescaler is assigned to Timer0)
// T0PS2:T0PS0 = 010 (1:8 Prescaler)
T0CONbits.T08BIT = 0;   // 16-bit timer
T0CONbits.T0CS = 0;     // Internal clock (Fosc/4)
T0CONbits.PSA = 0;      // Prescaler assigned to Timer0
T0CONbits.T0PS = 0b010; // 1:8 Prescaler

// Load initial timer value for 10ms delay
TMR0H = 0xFE;           // High byte
TMR0L = 0x3E;           // Low byte

// Enable Timer0 interrupt (if desired, otherwise poll TMR0IF)
INTCONbits.TMR0IF = 0;  // Clear Timer0 Interrupt Flag
INTCONbits.TMR0IE = 1;  // Enable Timer0 Overflow Interrupt
INTCONbits.GIE = 1;     // Enable Global Interrupts
INTCONbits.PEIE = 1;    // Enable Peripheral Interrupts (for TMR0IE)

T0CONbits.TMR0ON = 1;   // Start Timer0

}

// Example ISR (if using interrupts)
void __interrupt(high_priority) timer0_isr(void) {
if (INTCONbits.TMR0IF == 1) {
INTCONbits.TMR0IF = 0; // Clear Timer0 Interrupt Flag
// Reload timer for next 10ms (if periodic interrupt is needed)
TMR0H = 0xFE;
TMR0L = 0x3E;
// Your 10ms periodic task goes here
}
}

void main() {
// ... other initializations ...
init_timer0_10ms_delay();
while(1) {
// Main loop tasks
}
}

Comparison of Timer 0 8-bit and 16-bit Modes:

Advantages and Applications:

• 8-bit Mode:

  • Advantages: Simpler to program and manage due to operating on a single 8-bit register. Suitable when only short delays or high-frequency periodic events are required.
  • Typical Applications: Generating very short software delays, creating fast PWM signals (though dedicated PWM modules are better), blinking an LED at a high frequency, or as a fast event counter for limited range.

• 16-bit Mode:

  • Advantages: Offers a much wider range of delay values and event counts due to its larger capacity. This reduces the need for frequent interrupt service routines or complex software counting for longer durations.
  • Typical Applications: Generating longer time delays (e.g., in milliseconds or seconds), implementing real-time clocks (RTC) with appropriate crystal/oscillator, measuring longer pulse widths, or for general-purpose timing where high resolution over a broad range is needed. It's often preferred for general-purpose timing applications where flexibility in delay length is important.

Configuring PIC18's Timer 1 as an external event counter allows it to count rising or falling edges on a dedicated input pin (T1CKI). Here's how to do it using C programming, along with the crucial registers and bits:

Configuration Steps:

1. Stop Timer 1: Ensure Timer 1 is off by clearing the TMR1ON bit in T1CON before making configuration changes.
2. Select External Clock Source: Set the TMR1CS bit in T1CON to 1. This configures Timer 1 to use an external clock source on the T1CKI pin (RC0/T1OSO/T1CKI or RC1/T1OSI/T1CKI depending on configuration).
3. Select External Clock Synchronization (optional): The T1SYNC bit in T1CON determines if the external clock input is synchronized with the internal instruction clock. For event counting, it's often cleared (T1SYNC = 0) to allow asynchronous operation, ensuring every pulse is counted regardless of the internal clock phase. If T1SYNC = 1, the external clock is synchronized, which might cause loss of counts if the external clock is too fast or erratic.
4. Configure Prescaler (optional): Set the T1CKPS1:T1CKPS0 bits in T1CON to select a prescaler (1:1, 1:2, 1:4, or 1:8). For counting every event, a 1:1 prescaler is typically used.
5. Configure Timer 1 Oscillator (optional): If using the external oscillator feature (e.g., for a 32.768 kHz crystal), set T1OSCEN in T1CON. For simple event counting using a digital signal, this is usually not required.
6. Clear Timer 1: Set TMR1H and TMR1L to 0 to start counting from zero.
7. Start Timer 1: Set the TMR1ON bit in T1CON to 1 to begin counting external events.

Crucial Registers and Bits:

• T1CON Register:
  • TMR1ON (Bit 0): Controls Timer 1 on/off. Must be 1 to count.
  • TMR1CS (Bit 1): Timer 1 Clock Source Select. Set to 1 for external clock (event counter).
  • T1SYNC (Bit 2): Timer 1 External Clock Input Synchronization. Clear to 0 for asynchronous operation (counting every pulse).
  • T1CKPS1:T1CKPS0 (Bits 5:4): Timer 1 Input Clock Prescale Select bits. Set to 00 for 1:1 prescaler.
  • T1OSCEN (Bit 3): Timer 1 Oscillator Enable. Usually 0 for simple digital event counting.
• TMR1H and TMR1L Registers: These 8-bit registers form the 16-bit Timer 1 counter (TMR1H:TMR1L). The count value is read from these registers.

c

include <xc.h>

void init_timer1_external_counter(void) {
// Ensure Timer1 is off before configuration
T1CONbits.TMR1ON = 0; // Stop Timer1

// T1CON Register Setup:
// TMR1ON   = 0 (Timer1 is off)
// TMR1CS   = 1 (External clock source from T1CKI pin)
// T1SYNC   = 0 (Don't synchronize external clock input; count every pulse)
// T1OSCEN  = 0 (Disable Timer1 oscillator)
// T1CKPS1:T1CKPS0 = 00 (1:1 Prescaler - no prescaling)

T1CONbits.TMR1CS = 1;     // Select external clock source
T1CONbits.T1SYNC = 0;     // Do not synchronize external clock input
T1CONbits.T1OSCEN = 0;    // Disable Timer1 oscillator
T1CONbits.T1CKPS = 0b00;  // 1:1 prescaler (no prescaling)

// Configure RC0 (T1CKI) as an input pin
TRISCbits.TRISC0 = 1;     // Make RC0 an input
ANSELCbits.ANSC0 = 0;     // Ensure RC0 is digital (if applicable for your PIC18 model)

// Clear Timer1 count registers
TMR1H = 0x00;
TMR1L = 0x00;

// Start Timer1
T1CONbits.TMR1ON = 1;     // Enable Timer1

}

// Example of how to read the count in your main loop
void main() {
// ... other initializations ...
init_timer1_external_counter();

unsigned int event_count;

while(1) {
    // To read the 16-bit Timer1 value safely, read TMR1H first,
    // then TMR1L, then TMR1H again to check for roll-over.
    // If TMR1H changed between the two reads, re-read TMR1L then TMR1H again.
    // Or, use the auto-read feature (not explicit in all PIC18, but recommended practice).
    // For simplicity, here's a direct read (may have issues if an interrupt occurs between reads)

    event_count = (unsigned int)TMR1H << 8 | TMR1L;
    // Alternatively, for atomic read (if supported or by carefully reading twice):
    // unsigned char tmr1h_val, tmr1l_val;
    // do {
    //     tmr1h_val = TMR1H;
    //     tmr1l_val = TMR1L;
    // } while (tmr1h_val != TMR1H); // Loop until TMR1H is stable
    // event_count = (unsigned int)tmr1h_val << 8 | tmr1l_val;

    // You can now use 'event_count' for your application logic
    // For example, print it or display on an LCD

    // If you need to reset the count periodically, you can do:
    // TMR1H = 0x00;
    // TMR1L = 0x00;
}

}

Differentiating Timer 0 and Timer 1 in PIC18:

Typical Usage Scenarios:

• Timer 0:

  • 8-bit mode: Suitable for short, frequent delays, or high-frequency event counting with a limited range. Often used for simple tasks like blinking an LED or generating fast, approximate delays.
  • 16-bit mode: Used for general-purpose longer delays and broader event counting. Its configurable prescaler offers flexibility in range.
  • General: Simpler to use than Timer1 for basic timing due to its more straightforward control register (T0CON).

• Timer 1:

  • External Event Counter: Its T1SYNC bit makes it excellent for precise external event counting, as it can be configured to count asynchronously, even during sleep, without internal clock synchronization issues.
  • Real-Time Clock (RTC): With its ability to use an external 32.768 kHz crystal and operate during Sleep mode, Timer 1 is commonly used to implement low-power RTCs.
  • Pulse Width Measurement: The gate control feature (T1GE, T1GSS) makes it ideal for measuring pulse widths or periods of external signals.
  • Precise Delays: Being a 16-bit timer by default, it's well-suited for generating precise, longer delays, similar to Timer 0 in 16-bit mode, but with added features like asynchronous operation and gate control for more advanced applications.

Definition of Interrupts:

In the context of PIC18 microcontrollers, an interrupt is an asynchronous hardware mechanism that momentarily suspends the normal execution of the main program to handle an urgent or time-critical event. When an interrupt occurs, the microcontroller saves its current state (program counter, context registers), jumps to a special predefined memory location (the Interrupt Vector), and executes a dedicated subroutine called the Interrupt Service Routine (ISR). After the ISR completes its task, the microcontroller restores its previous state and resumes execution of the main program from where it left off.

Why Interrupts are Essential in Embedded System Design:

Interrupts are fundamental to efficient and responsive embedded system design for several reasons:

• Asynchronous Event Handling: Embedded systems often interact with external events (e.g., button presses, sensor data ready, communication signals) that occur unpredictably. Interrupts allow the system to react immediately to these events without constantly checking their status.
• Real-Time Responsiveness: For time-critical operations, interrupts ensure that the system can respond within a guaranteed timeframe, which is crucial for applications like motor control, data acquisition, or communication protocols.
• Efficiency and Resource Optimization: They prevent the CPU from wasting cycles by continuously checking for event statuses, freeing it up to perform other useful tasks.

Advantages over Polling:

Polling is an alternative method where the CPU repeatedly checks the status of various peripheral devices or flags in a loop to see if an event has occurred.

Here are the key advantages of interrupts over polling:

1. CPU Efficiency:

   • Interrupts: The CPU only diverts its attention to an event when it actually happens. It spends the majority of its time executing the main program or sleeping, leading to higher CPU utilization for productive work and lower power consumption.
   • Polling: The CPU continuously dedicates cycles to checking device statuses, regardless of whether an event has occurred. This can lead to significant CPU overhead, especially with many devices to monitor.

2. Responsiveness (Latency):

   • Interrupts: Provide near-instantaneous response to events. The latency between an event occurring and the ISR starting is typically very low and deterministic.
   • Polling: Response time is dependent on the polling frequency. If the polling loop is long, or if many devices are being polled, the delay between an event occurring and its detection can be significant and variable.

3. Simplicity for Complex Systems:

   • Interrupts: Simplify the design of systems with multiple asynchronous events, as each event can have its own dedicated ISR. This modularizes event handling.
   • Polling: Becomes cumbersome and complex in systems with many events, as the main loop needs to manage status checks for all devices, potentially leading to difficult-to-maintain code and missed events if not implemented carefully.

4. Power Saving:

   • Interrupts: Allow the microcontroller to enter low-power sleep modes and be woken up only when an interrupt event occurs, significantly reducing power consumption.
   • Polling: Typically requires the CPU to be continuously active, making it less suitable for battery-powered applications requiring low power.

The PIC18 microcontroller's interrupt system uses a hierarchical structure controlled by two main global enable bits: GIEH (Global Interrupt Enable High priority) and PEIE (Peripheral Interrupt Enable, also known as GIEL for Global Interrupt Enable Low priority).

Role of GIEH/GIE:

• GIEH (Global Interrupt Enable High Priority): This bit is the master switch for all interrupts, regardless of their priority level. If GIEH is 0, no interrupt (high or low priority) can be processed, even if individual peripheral interrupts are enabled. If GIEH is 1, high-priority interrupts are allowed, and also enables PEIE for low-priority interrupts (if IPEN is 1). In non-priority mode (IPEN=0), GIEH acts as the single GIE bit, enabling or disabling all interrupts.

Role of PEIE/GIEL:

• PEIE (Peripheral Interrupt Enable) / GIEL (Global Interrupt Enable Low Priority): This bit acts as a global enable for all peripheral interrupts, which are typically configured as low priority. In priority mode (IPEN = 1):
  • If PEIE is 0, no low-priority peripheral interrupt can be processed, even if GIEH is 1 and individual peripheral interrupt enables are set.
  • If PEIE is 1, low-priority peripheral interrupts are enabled, provided their individual enable bits are also set.
• In non-priority mode (IPEN = 0), PEIE typically functions as GIEL which enables all peripheral interrupts, effectively acting as a secondary global enable for peripherals.

Configuration for Interrupt Processing:

For any interrupt (whether high or low priority, internal or external) to be successfully processed by the PIC18 microcontroller, the following conditions must be met:

1. Individual Interrupt Enable Bit: The specific enable bit for the desired interrupt source must be set to 1. For example, for Timer 0 overflow interrupt, TMR0IE (in INTCON) must be 1; for an external interrupt on INT0, INT0IE (in INTCON) must be 1.

2. Peripheral Interrupt Enable (PEIE/GIEL): If the interrupt is a peripheral interrupt (e.g., Timer 0, Timer 1, ADC, serial communication, etc.), the PEIE bit (in INTCON) must be set to 1. This acts as a master enable for all peripheral interrupt sources.

3. Global Interrupt Enable (GIEH/GIE): The GIEH bit (in INTCON) must be set to 1. This is the ultimate master switch for all interrupts in the system.

   • If using priority mode (RCONbits.IPEN = 1):
     • For High-Priority Interrupts: GIEH must be 1.
     • For Low-Priority Interrupts: GIEH must be 1 AND PEIE must be 1.
   • If NOT using priority mode (RCONbits.IPEN = 0):
     • GIEH acts as the single GIE (Global Interrupt Enable) bit. GIEH must be 1 AND PEIE must be 1 for any interrupt to function. In this mode, PEIE effectively becomes GIEL and is a necessary condition for peripheral interrupts.

In summary, the most common sequence to enable interrupts is:

1. Configure the peripheral (e.g., Timer 0, External INT0).
2. Clear the interrupt flag (PIRx.IF, INTCON.TMR0IF, INTCON.INT0IF).
3. Set the individual interrupt enable bit (PIEx.IE, INTCON.TMR0IE, INTCON.INT0IE).
4. Set INTCONbits.PEIE = 1; (Enable peripheral interrupts).
5. Set INTCONbits.GIEH = 1; (Enable global interrupts).

This ensures that the interrupt path from the source to the CPU is fully opened.

General Structure of an ISR in C for PIC18:

In C, an Interrupt Service Routine (ISR) for PIC18 microcontrollers is defined using specific keywords or pragmas, depending on the compiler (e.g., XC8). A common structure looks like this:

c

include <xc.h>

// Define interrupt priority levels (if using priority mode)
// #pragma interrupt high_priority high_ISR
// #pragma interrupt low_priority low_ISR

// Or for non-priority mode / default priority:
void __interrupt(high_priority) my_isr(void) {
// 1. Check Interrupt Flags
if (INTCONbits.TMR0IF == 1) {
// This block handles Timer 0 Overflow Interrupt

    // 2. Perform ISR Task
    // e.g., Toggle an LED, increment a counter, read sensor data
    PORTBbits.RB0 = ~PORTBbits.RB0;

    // 3. Clear Interrupt Flag
    INTCONbits.TMR0IF = 0; // MUST clear the flag to prevent re-entering the ISR
}

if (INTCONbits.INT0IF == 1) {
    // This block handles External Interrupt 0

    // Perform ISR Task
    // e.g., increment event counter
    global_event_counter++;

    // Clear Interrupt Flag
    INTCONbits.INT0IF = 0;
}

// ... other interrupt flag checks for other sources

}

// Global variables (if needed by ISR and main code)
volatile unsigned int global_event_counter = 0;

void main(void) {
// ... Initialization code for peripherals, interrupts, etc. ...

// Enable Global Interrupts
INTCONbits.GIEH = 1; // Or GIE = 1 in non-priority mode
INTCONbits.PEIE = 1; // Enable Peripheral Interrupts

while (1) {
    // Main application loop code
    // This code executes when no interrupt is active
}

}

Critical Actions within an ISR and Why:

1. Context Saving (Automatic by Hardware/Compiler):

   • Why: When an interrupt occurs, the microcontroller's CPU automatically saves the program counter (PC) onto the stack. The C compiler for PIC18 (XC8) also automatically saves the context of all registers used within the ISR (WREG, STATUS, BSR, and others) to ensure that the main program's execution state is not corrupted. This makes ISRs re-entrant and transparent to the main program.
   • Action: No explicit C code is usually needed for this; it's handled by the hardware and compiler.

2. Identify Interrupt Source (Polling Flags):

   • Why: PIC18 microcontrollers typically have a single interrupt vector for all high-priority interrupts and another for all low-priority interrupts (if priority mode is enabled). Therefore, within a single ISR, the software must check which specific peripheral or event caused the interrupt.
   • Action: Use if statements to check the relevant interrupt flag (PIRxbits.PxIF, INTCONbits.TMR0IF, INTCONbits.INT0IF, etc.).

3. Perform Interrupt Service Task:

   • Why: This is the core purpose of the ISR – to handle the event that triggered the interrupt. It should be concise and execute as quickly as possible to minimize latency for other potential interrupts and to ensure the main program's responsiveness.
   • Action: Execute the necessary code: update variables, toggle pins, read data, clear error conditions, etc.

4. Clear the Interrupt Flag:

   • Why: This is absolutely critical. If the interrupt flag is not cleared, the microcontroller will immediately re-enter the ISR (or a subsequent interrupt will fire) after returning from the current one, leading to an infinite loop or system crash. Clearing the flag acknowledges that the event has been processed.
   • Action: Set the specific interrupt flag bit to 0 (e.g., INTCONbits.TMR0IF = 0;). Note that some flags are read-only and cleared by hardware or by reading an associated peripheral register.

5. Context Restoration (Automatic by Hardware/Compiler):

   • Why: After the ISR finishes, the microcontroller needs to restore the CPU's state exactly as it was before the interrupt occurred so that the main program can continue seamlessly.
   • Action: The RETFIE instruction (generated by the compiler at the end of the ISR) automatically restores the PC and enables global interrupts again, and the compiler restores the saved registers.

Interrupt Priority Levels in PIC18:

PIC18 microcontrollers offer a two-level interrupt priority scheme: High Priority and Low Priority. This scheme provides more control over interrupt handling, allowing critical tasks to be serviced before less critical ones.

Enabling and Assigning Priority:

1. Enable Priority Levels: The priority scheme is enabled by setting the IPEN bit (Interrupt Priority Enable) in the RCON (Reset Control) register. If IPEN = 0, the priority scheme is disabled, and all interrupts are treated as having the same priority (effectively low priority, but managed by GIEH/PEIE).

2. Assigning Priority to Interrupt Sources: Once IPEN is set to 1:

   • Each individual interrupt source (e.g., Timer 0, Timer 1, INT0, UART) has a corresponding Interrupt Priority (IP) bit, typically named _IP (e.g., TMR0IP, TMR1IP, INT0IP, RCIP). These bits are found in the IPR (Interrupt Priority Register) family, such as IPR1, IPR2, IPR3.
   • If _IP = 1, the interrupt source is assigned High Priority.
   • If _IP = 0, the interrupt source is assigned Low Priority.

   Example: To set Timer 0 interrupt as high priority: INTCON2bits.TMR0IP = 1;

Implications of Using a Priority Scheme:

1. Nested Interrupts:

   • High Priority: High-priority ISRs can interrupt the execution of low-priority ISRs. This allows critical tasks to preempt less critical ones.
   • Low Priority: Low-priority ISRs cannot interrupt any other ISR (neither high nor low priority). If a low-priority ISR is executing, all other interrupts (high and low) are deferred until the current low-priority ISR completes.

2. Interrupt Vectors:

   • PIC18 devices have two distinct interrupt vectors when IPEN = 1:
     • High-Priority Vector: Typically at 0x0008. The microcontroller jumps to this address when a high-priority interrupt occurs.
     • Low-Priority Vector: Typically at 0x0018. The microcontroller jumps to this address when a low-priority interrupt occurs.
   • Each vector requires its own __interrupt() function in C (e.g., void __interrupt(high_priority) high_isr(void) and void __interrupt(low_priority) low_isr(void)).

3. Responsiveness and Determinism:

   • High-priority interrupts offer the fastest and most deterministic response times for critical events, as they can preempt low-priority tasks.
   • Low-priority interrupts can experience longer latencies if a high-priority ISR is executing or if another low-priority ISR is already in progress.

4. Complexity:

   • Using priority levels adds a layer of complexity to interrupt management. The developer must carefully consider which events warrant high priority and ensure that high-priority ISRs are short and efficient to avoid blocking lower-priority tasks for too long.
   • Potential issues like priority inversion (where a high-priority task is blocked by a low-priority one holding a shared resource) must be carefully managed, often using mutexes or semaphores in more complex RTOS-based systems.

5. GIEH and PEIE Behavior:

   • When IPEN = 1:
     • GIEH (Global Interrupt Enable High Priority) enables high-priority interrupts.
     • PEIE (Peripheral Interrupt Enable) enables low-priority interrupts. GIEH must also be set for PEIE to have effect.

In essence, the priority scheme in PIC18 allows designers to build more robust and responsive embedded systems by ensuring that critical events are handled promptly, even when the microcontroller is busy with less urgent tasks. However, it requires careful planning to avoid unintended interactions between different interrupt levels.

Enabling and programming the Timer 0 overflow interrupt involves configuring the Timer 0 module itself and then setting up the interrupt control registers. Here are the steps:

1. Configure Timer 0 Module:

   • Stop Timer 0: Clear T0CONbits.TMR0ON = 0; to ensure Timer 0 is off during configuration.
   • Set Timer Mode: Decide between 8-bit or 16-bit mode. For 16-bit: T0CONbits.T08BIT = 0;. For 8-bit: T0CONbits.T08BIT = 1;.
   • Select Clock Source: For timing applications, use the internal instruction clock: T0CONbits.T0CS = 0;.
   • Configure Prescaler: Choose whether to use a prescaler and select its ratio. For example, T0CONbits.PSA = 0; (assign prescaler) and T0CONbits.T0PS = 0b010; (1:8 prescaler).
   • Load Initial Count Value: Calculate and load the desired starting value into TMR0H and TMR0L (for 16-bit) or just TMR0L (for 8-bit). This value determines when the overflow will occur.

2. Configure Interrupts:

   • Clear Timer 0 Interrupt Flag: Clear INTCONbits.TMR0IF = 0;. This ensures that any pending flag from previous operations doesn't trigger an immediate interrupt after enabling.
   • Enable Timer 0 Interrupt: Set INTCONbits.TMR0IE = 1;. This allows Timer 0 overflow events to generate an interrupt request.
   • Enable Peripheral Interrupts: Set INTCONbits.PEIE = 1;. This is a master enable for all peripheral interrupts, including Timer 0.
   • Enable Global Interrupts: Set INTCONbits.GIEH = 1;. This is the ultimate master enable for all interrupts in the system. If using priority, this enables high-priority interrupts; otherwise, it's the main global enable.
   • Set Timer 0 Interrupt Priority (Optional, if IPEN = 1): If using interrupt priority, set INTCON2bits.TMR0IP = 1; for high priority or 0 for low priority. Also, remember to set RCONbits.IPEN = 1; to enable the priority scheme.

3. Start Timer 0:

   • Enable Timer 0: Set T0CONbits.TMR0ON = 1;. Timer 0 will now start counting, and an interrupt will occur upon overflow.

4. Write the Interrupt Service Routine (ISR):

   • Create a C function designated as an ISR (e.g., void __interrupt() my_timer0_isr(void) or with high_priority/low_priority keywords).
   • Inside the ISR, first check if (INTCONbits.TMR0IF == 1) to confirm Timer 0 caused the interrupt.
   • Perform the desired task (e.g., toggle an LED, increment a counter).
   • Crucially, clear the INTCONbits.TMR0IF = 0; flag before exiting the ISR to acknowledge the interrupt and allow future interrupts.

Calculation of Initial Value:

1. Oscillator Frequency (F_OSC): 4 MHz
2. Instruction Cycle Frequency (F_CY):
3. Instruction Cycle Time (T_CY):
4. Prescaler Value: 1:4
5. Timer Clock Period:
6. Desired Delay: 50 ms =
7. Number of Counts:
8. Maximum 16-bit Timer Value:
9. Initial Timer Value (to count up to overflow):
10. Hexadecimal Value:
    • TMR1H = 0xCE
    • TMR1L = 0xCC

C Code Snippet:

c

include <xc.h>

// Global variables (if needed for the ISR)
volatile unsigned char timer1_flag = 0;

void init_timer1_50ms_interrupt(void) {
// Ensure Timer1 is off before configuration
T1CONbits.TMR1ON = 0; // Stop Timer1

// T1CON Register Setup:
// TMR1ON   = 0 (Timer1 is off)
// TMR1CS   = 0 (Internal clock (Fosc/4))
// T1SYNC   = 0 (Ignored for internal clock)
// T1OSCEN  = 0 (Disable Timer1 oscillator)
// T1CKPS1:T1CKPS0 = 10 (1:4 Prescaler)

T1CONbits.TMR1CS = 0;     // Internal clock (Fosc/4)
T1CONbits.T1SYNC = 0;     // Not applicable for internal clock
T1CONbits.T1OSCEN = 0;    // Disable Timer1 oscillator
T1CONbits.T1CKPS = 0b10;  // 1:4 prescaler

// Load initial timer value for 50ms delay
TMR1H = 0xCE;             // High byte
TMR1L = 0xCC;             // Low byte

// Interrupt Configuration:
PIR1bits.TMR1IF = 0;      // Clear Timer1 Interrupt Flag
PIE1bits.TMR1IE = 1;      // Enable Timer1 Overflow Interrupt

// Optional: Set Timer1 interrupt priority (if IPEN = 1)
// IPR1bits.TMR1IP = 1;   // Set Timer1 as High Priority

INTCONbits.GIE = 1;       // Enable Global Interrupts (for non-priority mode)
INTCONbits.PEIE = 1;      // Enable Peripheral Interrupts

T1CONbits.TMR1ON = 1;     // Start Timer1

}

// Timer1 Interrupt Service Routine
void __interrupt() isr_routine(void) {
if (PIR1bits.TMR1IF == 1) {
PIR1bits.TMR1IF = 0; // Clear Timer1 Interrupt Flag

    // Reload timer for the next 50ms interval
    TMR1H = 0xCE;
    TMR1L = 0xCC;

    timer1_flag = 1;      // Set a flag to signal the main loop
}
// ... other interrupt checks if multiple interrupts are used ...

}

void main() {
// Set up oscillator, digital I/O, etc.
TRISBbits.TRISB0 = 0; // Example: RB0 as output for LED
LATBbits.LATB0 = 0; // Initialize LED off

init_timer1_50ms_interrupt();

while(1) {
    if (timer1_flag == 1) {
        timer1_flag = 0;
        // Perform your 50ms periodic task here
        LATBbits.LATB0 = ~LATBbits.LATB0; // Toggle LED every 50ms
    }
    // Other main loop tasks
}

}

c

include <xc.h>

// --- Configuration for Timer 0 and Interrupts (typically in main or init function) ---
void init_timer0_for_isr(void) {
// Stop Timer0 during configuration
T0CONbits.TMR0ON = 0;

// Example: Configure Timer0 for 16-bit mode, Fosc/4, 1:256 prescaler
// Adjust these settings based on your desired overflow period
T0CONbits.T08BIT = 0;   // 16-bit Timer0
T0CONbits.T0CS = 0;     // Internal clock (Fosc/4)
T0CONbits.PSA = 0;      // Prescaler assigned to Timer0
T0CONbits.T0PS = 0b111; // 1:256 Prescaler

// Load initial value (e.g., for a 1-second delay with 4MHz Fosc, Fosc/4=1MHz, 1:256 prescaler
// Timer clock = 256 us. Counts for 1s = 1,000,000us / 256us = 3906.25 -> ~3906 counts.
// Initial value = 65536 - 3906 = 61630 (0xF18E)
TMR0H = 0xF1;           // High byte
TMR0L = 0x8E;           // Low byte

// Configure RB0 as output for the LED
TRISBbits.TRISB0 = 0;   // Set RB0 as output
LATBbits.LATB0 = 0;     // Ensure LED is initially OFF

// Interrupt Configuration:
INTCONbits.TMR0IF = 0;  // Clear Timer0 Interrupt Flag
INTCONbits.TMR0IE = 1;  // Enable Timer0 Overflow Interrupt
INTCONbits.PEIE = 1;    // Enable Peripheral Interrupts
INTCONbits.GIE = 1;     // Enable Global Interrupts (for non-priority mode)
// If using priority mode, also set RCONbits.IPEN = 1 and INTCON2bits.TMR0IP = 1/0

// Start Timer0
T0CONbits.TMR0ON = 1;

}

// --- Timer 0 Interrupt Service Routine (ISR) ---
// The interrupt() keyword is compiler-specific (e.g., XC8)
// For priority mode, use interrupt(high_priority) or __interrupt(low_priority)
void __interrupt() timer0_overflow_isr(void) {
// Check if the interrupt was caused by Timer 0 overflow
if (INTCONbits.TMR0IF == 1) {
// 1. Clear the Timer 0 Interrupt Flag
// This is crucial to prevent the ISR from being immediately re-entered
// after it finishes, as the flag would still be set.
INTCONbits.TMR0IF = 0;

    // 2. Reload the Timer 0 registers if periodic interrupts are desired
    // The timer continues counting from its current value after an overflow.
    // To maintain a fixed interval, reload the initial count value.
    // Using the example values from init_timer0_for_isr for a ~1-second interval
    TMR0H = 0xF1; // High byte
    TMR0L = 0x8E; // Low byte

    // 3. Perform the desired task (toggle LED)
    LATBbits.LATB0 = ~LATBbits.LATB0; // Toggle the state of RB0 (LED)
}
// If you have other interrupt sources using the same ISR vector,
// add 'else if' checks for their flags here.

}

void main(void) {
// Basic configuration (e.g., oscillator, port setup if not handled in init_timer0)
// Ensure watchdog timer is off if not used, etc.
// OSCCON = 0x70; // Example for 4MHz internal oscillator (if applicable)

// Initialize Timer 0 and its interrupts
init_timer0_for_isr();

while (1) {
    // Main application loop
    // The CPU will execute this loop indefinitely,
    // and be interrupted periodically by Timer 0 overflow.
    // No polling for the LED is needed here.
}

}

Real-World Application: Motor Speed Control using Pulse Width Modulation (PWM)

Application: Controlling the speed of a DC motor in an embedded system, such as in a robotics platform, a drone, or an industrial automation system.

How Timer Interrupts Contribute:

Pulse Width Modulation (PWM) is a common technique used to control the average power delivered to a motor, thereby controlling its speed. While PIC18 microcontrollers have dedicated PWM modules, understanding how timer interrupts could implement a basic software PWM helps illustrate their importance.

1. Periodic Event Generation:

   • Need: To generate a PWM signal, we need a periodic waveform with a fixed frequency (e.g., 1 kHz, meaning a period of 1 ms). This ensures smooth motor operation and predictable behavior.
   • Timer Interrupt Role: A timer module (e.g., Timer 0 or Timer 1) is configured to generate an interrupt at a very precise, fixed interval, which defines the PWM period. For instance, if a 1 kHz PWM signal is desired, the timer would be set to overflow and trigger an interrupt every 1 millisecond.

2. Controlling Duty Cycle:

   • Need: The motor speed is controlled by the PWM's duty cycle – the proportion of time the signal is 'ON' within one period. A higher 'ON' time (higher duty cycle) means more power and higher speed.
   • Timer Interrupt Role:
     • Start of Period: When the timer interrupt (marking the start of a new PWM period) occurs, the ISR is executed. Inside the ISR, the motor control pin is set HIGH (motor is ON).
     • Duty Cycle Delay: The ISR then needs to set up a mechanism to turn the motor pin LOW after a specific duration (the 'ON' time). This could be done by:
       • Using another timer (or reloading the same timer) for a smaller delay: This timer would be configured to interrupt after the ON time has elapsed.
       • Software Delay (less ideal for precision): A small, calculated software delay loop might be used, but this consumes CPU cycles.
     • End of 'ON' Time: When the 'ON' time expires (either by another timer's interrupt or software delay), the motor control pin is set LOW (motor is OFF). The pin remains LOW until the next PWM period starts.

3. Overall System Operation:

   • The main program can then simply adjust a variable (e.g., duty_cycle_value) based on user input (potentiometer, buttons) or feedback (speed sensor).
   • The Timer ISR uses this duty_cycle_value to calculate the ON time for each PWM period. For example, if the period is 1ms and duty_cycle_value represents 50%, the ISR sets the pin HIGH for 0.5ms and then LOW for 0.5ms.

Why Interrupts are Crucial Here:

• Precision and Timing: Motor control requires very precise timing for the PWM signal. Timer interrupts provide this accuracy by executing the ISR at exact, hardware-controlled intervals, unlike polling which can be affected by other tasks in the main loop.
• Background Operation: The PWM generation happens in the background via interrupts. The main program is free to handle other tasks like reading sensors, communicating, or updating user interfaces without worrying about missing PWM cycles or introducing jitter.
• CPU Efficiency: The CPU only gets involved when an interrupt occurs (briefly), rather than constantly checking timers or port states in a busy-wait loop, thus maximizing CPU availability for other computations.

Without timer interrupts, implementing a reliable software PWM (or any precise periodic task) would require constant polling of timers in the main loop, making the system inefficient, less responsive to other events, and prone to timing inconsistencies.

Utilizing an external hardware interrupt like INT0 allows the PIC18 microcontroller to respond to a change on a specific input pin, typically from an external event like a button press or sensor output. Here are the configuration steps:

1. Configure the External Interrupt Pin:

   • Set Pin Direction: The pin associated with the external interrupt (e.g., RB0 for INT0) must be configured as an input. Set the corresponding TRIS bit to 1 (e.g., TRISBbits.TRISB0 = 1;).
   • Disable Analog Function (if applicable): If the pin is multiplexed with an analog input, ensure its analog function is disabled. Set the corresponding ANSEL bit to 0 (e.g., ANSELBbits.ANSELB0 = 0;).

2. Configure the External Interrupt Control Register:

   • Select Edge Trigger: Use the INTEDG bit (e.g., INTCON2bits.INTEDG0) to select whether the interrupt triggers on a rising edge (1) or a falling edge (0).
     • INTCON2bits.INTEDG0 = 1; // Interrupt on rising edge for INT0
     • INTCON2bits.INTEDG0 = 0; // Interrupt on falling edge for INT0

3. Configure Interrupt Enable and Flag Registers:

   • Clear External Interrupt Flag: Clear the individual interrupt flag for the external interrupt (e.g., INTCONbits.INT0IF = 0;). This prevents an immediate, spurious interrupt from occurring if the pin state was already at the trigger level when the interrupt was enabled.
   • Enable External Interrupt: Set the individual interrupt enable bit (e.g., INTCONbits.INT0IE = 1;). This allows events on the INT0 pin to generate an interrupt request.

4. Configure Global Interrupt Enables:

   • Enable Peripheral Interrupts: Set INTCONbits.PEIE = 1; (or GIEL). While external interrupts like INT0, INT1, INT2 are often considered core interrupts rather than 'peripheral' in some contexts, enabling PEIE is generally a good practice for overall interrupt system stability, especially if other peripheral interrupts might also be used.
   • Enable Global Interrupts: Set INTCONbits.GIEH = 1; (or GIE). This is the master enable for the entire interrupt system.

5. Set Interrupt Priority (Optional, if IPEN = 1):

   • If using interrupt priority (RCONbits.IPEN = 1), assign a priority level to the external interrupt. For INT0, this is INTCON2bits.INT0IP.
     • INTCON2bits.INT0IP = 1; // High priority for INT0
     • INTCON2bits.INT0IP = 0; // Low priority for INT0

6. Write the Interrupt Service Routine (ISR):

   • Create a C function and designate it as an ISR (e.g., void __interrupt() my_int0_isr(void) or with high_priority/low_priority).
   • Inside the ISR, check if (INTCONbits.INT0IF == 1) to confirm INT0 caused the interrupt.
   • Perform the required task (e.g., increment a counter, toggle an LED, start a timer).
   • Crucially, clear the INTCONbits.INT0IF = 0; flag before exiting the ISR to acknowledge the interrupt and allow future interrupts. This flag is not cleared automatically by hardware for external interrupts.

c

include <xc.h>

// Declare a global volatile variable for the event counter
// 'volatile' is essential to tell the compiler that this variable can be
// changed by something outside the normal program flow (i.e., the ISR),
// preventing aggressive optimizations that might lead to incorrect behavior.
volatile unsigned int eventCount = 0;

// --- Configuration for INT0 (typically in main or an init function) ---
void init_int0_interrupt(void) {
// 1. Configure RB0 (INT0 pin) as digital input
TRISBbits.TRISB0 = 1; // Set RB0 as input
ANSELBbits.ANSELB0 = 0; // Ensure RB0 is digital (if applicable)

// 2. Configure INT0 for falling edge detection
INTCON2bits.INTEDG0 = 0;  // Interrupt on falling edge

// 3. Clear the INT0 interrupt flag
INTCONbits.INT0IF = 0;    // Clear any pending INT0 interrupt

// 4. Enable the INT0 interrupt
INTCONbits.INT0IE = 1;    // Enable the External Interrupt 0

// 5. Enable Peripheral and Global Interrupts
INTCONbits.PEIE = 1;      // Enable Peripheral Interrupts
INTCONbits.GIE = 1;       // Enable Global Interrupts (for non-priority mode)
// If using priority mode: RCONbits.IPEN = 1; INTCON2bits.INT0IP = 1/0; INTCONbits.GIEH = 1;

}

// --- External Interrupt 0 Service Routine (ISR) ---
// The interrupt() keyword is compiler-specific (e.g., XC8)
// For priority mode, use interrupt(high_priority) or __interrupt(low_priority)
void __interrupt() external_int0_isr(void) {
// Check if the interrupt was caused by INT0
if (INTCONbits.INT0IF == 1) {
// 1. Increment the global event counter
eventCount++;

    // 2. Clear the INT0 Interrupt Flag
    // This is crucial to prevent the ISR from being immediately re-entered
    // after it finishes, as the flag would still be set.
    INTCONbits.INT0IF = 0;
}
// If other interrupt sources share this ISR vector, add 'else if' checks here.

}

void main(void) {
// Basic configuration (e.g., oscillator, other port setup)
// OSCCON = 0x70; // Example for 4MHz internal oscillator

init_int0_interrupt(); // Initialize INT0 and its interrupts

// Example: Initialize an LCD or serial port to display eventCount
// init_lcd();
// lcd_clear();
// lcd_goto(0,0);
// lcd_puts("Event Count:");

while (1) {
    // Main application loop
    // The CPU will execute this loop indefinitely, until an INT0 interrupt occurs.

    // Example: Display the eventCount on an LCD periodically
    // lcd_goto(1,0);
    // lcd_printf("%u", eventCount);
    // __delay_ms(100);
}

}

Edge-Triggered vs. Level-Triggered External Interrupts:

1. Edge-Triggered Interrupts:

• Definition: An edge-triggered interrupt is generated when the logic level on the interrupt pin changes from one state to another (a 'transition'). This transition can be a rising edge (low-to-high) or a falling edge (high-to-low).
• How it Works: The microcontroller detects the change in voltage level. Once the edge is detected, an internal interrupt flag is set, and the ISR is triggered. The interrupt will not re-trigger until the pin's state changes again and then another programmed edge occurs.
• PIC18 Implementation: For external interrupts like INT0, INT1, INT2, the INTEDG bits (e.g., INTCON2bits.INTEDG0) determine the active edge.
  • INTEDG = 1: Rising edge triggered.
  • INTEDG = 0: Falling edge triggered.
• Key Characteristic: They respond to an event (the transition), not a state (the level).

2. Level-Triggered Interrupts:

• Definition: A level-triggered interrupt is generated and remains active as long as the interrupt pin is held at a particular logic level (either high or low).
• How it Works: If the interrupt pin is at the active level (e.g., HIGH for a high-level triggered interrupt), the interrupt flag is continuously asserted, and the ISR will be repeatedly called or the system could get stuck in the ISR if the flag isn't properly cleared or the condition isn't removed.
• PIC18 Implementation: PIC18's dedicated external interrupts (INT0, INT1, INT2) are primarily edge-triggered. While some other peripherals like change notification (IOC) or specific module interrupts might be level-sensitive, the INTx pins themselves are designed for edge detection.
• Key Characteristic: They respond to a state (the level), not an event.

Preference for Simple Button Presses:

Edge-triggered interrupts are generally preferred for simple button presses.

Why?

1. Debouncing: Buttons are mechanical devices that exhibit 'bounce' when pressed or released. This means a single physical press can generate multiple rapid electrical transitions (edges). If a level-triggered interrupt were used, the system might continuously trigger as long as the button is held down at the active level, leading to multiple unwanted detections.

   • An edge-triggered interrupt, combined with software debouncing (e.g., by introducing a small delay or timer after the first interrupt and ignoring further transitions for a short period), is far more effective. The initial edge triggers the ISR, and subsequent bounces can be filtered out.

2. Single Event Detection: A button press is typically considered a single event. An edge-triggered interrupt precisely captures this single event (either the press or the release), regardless of how long the button is held down.

3. Efficiency: With an edge-triggered interrupt, the ISR is executed only once per distinct press (after debouncing). The CPU isn't continuously interrupted or stuck in the ISR if the button remains pressed, which improves overall system efficiency.

In summary, edge-triggered interrupts provide a more robust and efficient way to detect momentary events like button presses by focusing on the transition, making them easier to debounce and preventing unwanted repeated triggers.

Polling vs. Interrupt-Driven I/O:

These are two fundamental methods for an embedded system's CPU to interact with external hardware or internal peripherals.

1. Polling (or Busy-Waiting):

• Definition: The CPU continuously checks the status of a device or a flag in a loop until a specific condition is met or an event occurs. The CPU dedicates its resources to constantly inquire about the device's state.
• Analogy: Repeatedly asking "Are you done yet? Are you done yet?" to someone until they finish their task.

Advantages of Polling:

• Simplicity: Easier to implement for very simple systems or for tasks where timing is not critical or where only a few devices are monitored.
• No Overhead (for Context Switching): No interrupt latency or context saving/restoring overhead, as the program flow is linear.
• Predictable Execution Flow: The code execution path is generally straightforward and easier to debug, as there are no sudden jumps to ISRs.

Disadvantages of Polling:

• CPU Inefficiency: Wastes CPU cycles by constantly checking status, even when no event has occurred. This is a major drawback for systems needing to perform other computations.
• Poor Responsiveness: Response time to an event depends on the polling frequency and the length of the polling loop. Events can be missed or handled with significant delay if the loop is too long.
• High Power Consumption: The CPU must remain active and busy, preventing it from entering low-power sleep modes.
• Complexity with Multiple Devices: Becomes very difficult to manage if many devices need to be monitored simultaneously, as the polling loop grows large and can easily miss events from slower devices.

2. Interrupt-Driven I/O:

• Definition: The external hardware or peripheral signals the CPU when an event has occurred or when it's ready for service. The CPU temporarily suspends its current task, jumps to a specific Interrupt Service Routine (ISR) to handle the event, and then resumes its main task.
• Analogy: Someone tapping you on the shoulder to tell you they are done, so you can immediately address them.

Advantages of Interrupt-Driven I/O:

• CPU Efficiency: The CPU is only interrupted when an event occurs, freeing it to perform other useful work or enter low-power sleep modes. This leads to higher overall system throughput.
• Real-Time Responsiveness: Provides near-instantaneous response to events. The latency between an event and the start of its ISR is typically low and predictable, making it ideal for time-critical applications.
• Power Saving: Allows the CPU to enter sleep modes, waking up only upon an interrupt, significantly reducing power consumption for battery-powered devices.
• Scalability for Multiple Devices: Easily handles multiple asynchronous events from different sources, as each can have its own ISR or be managed within a shared ISR.

Disadvantages of Interrupt-Driven I/O:

• Increased Complexity: Requires careful setup of interrupt control registers and writing robust ISRs. Debugging can be more challenging due to the asynchronous nature of interrupts.
• Context Switching Overhead: There's a small overhead associated with saving and restoring the CPU's context (registers) when entering and exiting an ISR.
• Shared Resource Management: Accessing shared global variables between the main program and ISRs requires volatile keyword and critical sections (disabling interrupts temporarily) to prevent data corruption.
• Re-entrancy Issues: ISRs must be carefully written to be re-entrant if multiple interrupts can occur or if an ISR itself can be interrupted (in priority-based systems).

Conclusion:

For modern, efficient, and responsive embedded systems, interrupt-driven I/O is generally the preferred method, especially when dealing with asynchronous events, multiple peripherals, or power constraints. Polling is typically reserved for very simple applications, initialization routines, or when debugging specific hardware states in a controlled manner.

Managing interrupts in PIC18 microcontrollers involves several key Special Function Registers (SFRs). These registers work together to enable, disable, prioritize, and flag various interrupt sources.

Here's a list of the most important ones:

1. INTCON (Interrupt Control Register):

   • Purpose: This is one of the most fundamental interrupt control registers. It contains global interrupt enable bits and control/flag bits for several core interrupt sources.
   • Key Bits:
     • GIEH (Global Interrupt Enable High Priority) / GIE (Global Interrupt Enable): Master switch for all interrupts.
     • PEIE (Peripheral Interrupt Enable) / GIEL (Global Interrupt Enable Low Priority): Master switch for all peripheral interrupts.
     • TMR0IE: Timer 0 Overflow Interrupt Enable.
     • INT0IE: External Interrupt 0 Enable.
     • TMR0IF: Timer 0 Overflow Interrupt Flag.
     • INT0IF: External Interrupt 0 Flag.

2. INTCON2 (Interrupt Control Register 2):

   • Purpose: Provides additional control for external interrupts (INTx) and Timer 0 interrupt priority. It typically holds the INTEDG bits for edge selection and TMR0IP for Timer 0 priority.
   • Key Bits:
     • INTEDG0, INTEDG1, INTEDG2: External Interrupt Edge Select bits (0: falling edge, 1: rising edge).
     • TMR0IP: Timer 0 Interrupt Priority bit (0: low, 1: high).
     • RBIP: RB Port Change Interrupt Priority bit.

3. INTCON3 (Interrupt Control Register 3):

   • Purpose: Contains enable and flag bits for external interrupts INT1 and INT2, and their priority bits.
   • Key Bits:
     • INT1IE, INT2IE: External Interrupt 1/2 Enable.
     • INT1IP, INT2IP: External Interrupt 1/2 Priority.
     • INT1IF, INT2IF: External Interrupt 1/2 Flags.

4. RCON (Reset Control Register):

   • Purpose: While primarily a reset control register, it holds a critical bit for enabling the interrupt priority scheme.
   • Key Bit:
     • IPEN (Interrupt Priority Enable): When set to 1, enables high and low interrupt priority levels. When 0, all interrupts are non-priority.

5. PIEx (Peripheral Interrupt Enable Registers - PIE1, PIE2, PIE3, etc.):

   • Purpose: These registers contain the individual enable bits for various peripheral interrupt sources (e.g., Timer 1, Timer 2, ADC, UART, SSP, CCP, etc.). Each PIEx register typically corresponds to a group of peripherals.
   • Key Bits (Examples):
     • PIE1bits.TMR1IE: Timer 1 Overflow Interrupt Enable.
     • PIE1bits.RCIE: EUSART Receive Interrupt Enable.
     • PIE2bits.ADIE: ADC Conversion Complete Interrupt Enable.

6. PIRx (Peripheral Interrupt Request Registers - PIR1, PIR2, PIR3, etc.):

   • Purpose: These registers contain the interrupt flag bits for the peripheral interrupt sources. A flag bit is set by hardware when a corresponding event occurs, indicating that an interrupt is pending.
   • Key Bits (Examples):
     • PIR1bits.TMR1IF: Timer 1 Overflow Interrupt Flag.
     • PIR1bits.RCIF: EUSART Receive Interrupt Flag.
     • PIR2bits.ADIF: ADC Conversion Complete Interrupt Flag.

7. IPRx (Interrupt Priority Registers - IPR1, IPR2, IPR3, etc.):

   • Purpose: These registers contain the individual priority bits for various peripheral interrupt sources. These bits are active only when IPEN in RCON is set to 1.
   • Key Bits (Examples):
     • IPR1bits.TMR1IP: Timer 1 Overflow Interrupt Priority (0: low, 1: high).
     • IPR1bits.RCIP: EUSART Receive Interrupt Priority.
     • IPR2bits.ADIP: ADC Conversion Complete Interrupt Priority.

These registers allow for fine-grained control over the interrupt system, enabling designers to prioritize tasks and ensure efficient and timely handling of various events within the embedded application.

To achieve both measuring an external pulse duration and performing a periodic task every 10ms, we can effectively combine Timer 0, Timer 1, and an external interrupt (e.g., INT0) in a PIC18 microcontroller. Here's an outline of the configuration and operational flow:

1. System Setup Overview:

• External Pulse Measurement: We'll use Timer 1 in counter mode, controlled by an external interrupt (INT0) on the rising and falling edges of the pulse.
• Periodic Task (10ms): We'll use Timer 0 in timer mode, configured to generate an interrupt every 10ms.

2. Component Configuration:

A. Timer 0 for 10ms Periodic Task:

• Mode: Configure Timer 0 for 16-bit timer mode (T0CONbits.T08BIT = 0).
• Clock Source: Use the internal instruction clock (Fosc/4) (T0CONbits.T0CS = 0).
• Prescaler: Select an appropriate prescaler (e.g., 1:8 or 1:16) to achieve the 10ms overflow. Calculate the initial TMR0H:TMR0L value. For a 4MHz Fosc, Tcy=1µs. With 1:8 prescaler, Timer clock = 8µs. For 10ms (10000µs), need 10000/8 = 1250 counts. Initial value = 65536 - 1250 = 64286 (0xFE3E).
• Interrupts:
  • Clear INTCONbits.TMR0IF = 0;.
  • Enable INTCONbits.TMR0IE = 1;.
  • Priority: Assign high priority if the 10ms task is critical (INTCON2bits.TMR0IP = 1;).
• Start: Enable Timer 0 (T0CONbits.TMR0ON = 1;).

B. Timer 1 for External Pulse Duration Measurement:

• Mode: Configure Timer 1 in 16-bit counter mode. It should count external events from its T1CKI pin (e.g., RC0/T1CKI).
• Clock Source: External clock source from T1CKI pin (T1CONbits.TMR1CS = 1;).
• Synchronization: Disable synchronization for precise event counting (T1CONbits.T1SYNC = 0;).
• Prescaler: Use 1:1 prescaler (T1CONbits.T1CKPS = 0b00;) to count every external pulse directly.
• Interrupts: Timer 1 itself doesn't need to generate an interrupt for this purpose; its value will be read by the INT0 ISR.
• Port Pin: Configure TRISCbits.TRISC0 = 1; (RC0 as input) and ANSELCbits.ANSC0 = 0; (digital).
• Start/Stop: Timer 1 will be started and stopped by the external interrupt INT0.

C. External Interrupt (INT0) for Pulse Edges:

• Pin: Configure the INT0 pin (e.g., RB0) as a digital input (TRISBbits.TRISB0 = 1;, ANSELBbits.ANSELB0 = 0;).
• Edge Triggering: The INTEDG0 bit will be dynamically changed in the ISR to detect both rising and falling edges.
• Interrupts:
  • Clear INTCONbits.INT0IF = 0;.
  • Enable INTCONbits.INT0IE = 1;.
  • Priority: Assign high priority (INTCON2bits.INT0IP = 1;) as pulse measurement is time-critical.

D. Global Interrupts:

• Enable interrupt priority (RCONbits.IPEN = 1;).
• Enable global high-priority interrupts (INTCONbits.GIEH = 1;).
• Enable peripheral interrupts (INTCONbits.PEIE = 1;).

3. Interrupt Service Routines (ISRs):

A. Timer 0 ISR (void __interrupt(high_priority) timer0_isr(void)):

• Check INTCONbits.TMR0IF == 1.
• Clear INTCONbits.TMR0IF = 0;.
• Reload TMR0H:TMR0L with 0xFE3E for the next 10ms period.
• Execute the 10ms periodic task (e.g., update a display, perform sensor reading, background processing).

B. INT0 ISR (void __interrupt(high_priority) int0_isr(void)):

• Check INTCONbits.INT0IF == 1.
• Clear INTCONbits.INT0IF = 0;.
• Logic:
  • If INTCON2bits.INTEDG0 is 1 (currently looking for falling edge, meaning pulse started):
    • Stop Timer 1 (T1CONbits.TMR1ON = 0;).
    • Read TMR1H:TMR1L to get the measured pulse duration.
    • Store the duration (e.g., in a global pulse_duration variable).
    • Reload TMR1H:TMR1L = 0x0000;.
    • Change INTCON2bits.INTEDG0 = 0; to prepare for rising edge detection.
  • Else (INTCON2bits.INTEDG0 is 0, currently looking for rising edge, meaning pulse ended):
    • Start Timer 1 (T1CONbits.TMR1ON = 1;).
    • Change INTCON2bits.INTEDG0 = 1; to prepare for falling edge detection.

4. Main Loop:

• Initialize all peripherals and interrupts.
• Start Timer 0.
• Set initial INTEDG0 = 0; (to detect the first rising edge of a pulse).
• The main loop can then continuously process the pulse_duration variable (e.g., display it) and perform other non-time-critical tasks. It will be asynchronously interrupted by Timer 0 and INT0 for their respective functions.

This approach ensures that both time-critical operations are handled efficiently and precisely without blocking each other or the main application flow.