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Practice MCQ

Unit 6 - Notes

ECE221

Unit 6: Operational Amplifier Applications II

1. Introduction to Comparators and Converters

In analog electronics, Operational Amplifiers (Op-Amps) are not limited to linear amplification. They are extensively used in non-linear applications where the output switches between saturation levels (Comparators) or processes signals to interface with digital systems (Converters).

  • Comparators: Circuits that compare two input voltages and produce an output indicating which one is larger. They effectively serve as 1-bit Analog-to-Digital converters.
  • Converters: Circuits that bridge the analog domain (continuous signals) and the digital domain (discrete binary levels). This includes ADC (Analog-to-Digital), DAC (Digital-to-Analog), V-to-F (Voltage-to-Frequency), and F-to-V (Frequency-to-Voltage).

2. Basic Comparator

The basic comparator uses an Op-Amp in an open-loop configuration (no feedback). Due to the infinite (ideal) or very high (practical) open-loop gain (), a very small difference between input terminals drives the output into saturation.

Operation Principles

  • Inputs: A reference voltage () is applied to one input, and the signal voltage () to the other.
  • Non-Inverting Comparator: to (+) and to (-).
    • If
    • If
  • Inverting Comparator: to (-) and to (+).
    • If
    • If

Limitations

  • Noise Sensitivity: If fluctuates slightly around due to noise, the output will oscillate rapidly between and . This is known as "chatter."
  • Speed: Standard Op-Amps (like 741) have a slew rate limit. Dedicated comparator ICs (like LM339) differ from Op-Amps as they are designed for faster switching and logic-level compatibility.

3. Zero Crossing Detector (ZCD)

A Zero Crossing Detector is a specific application of a comparator where the reference voltage is set to 0V (Ground).

Operation

The circuit detects when an input signal crosses the zero-voltage axis.

  • Input: Usually a Sine wave.
  • Output: A Square wave.
    • Whenever the sine wave is positive, drives to one saturation level.
    • Whenever the sine wave is negative, drives to the opposing saturation level.

Applications

  1. Sine to Square Wave Converter: Converting analog signals to digital timing pulses.
  2. Phase Meters: Measuring the time difference between zero crossings of two signals.
  3. Frequency Counters: Determining the frequency of a periodic waveform.

4. Schmitt Trigger (Regenerative Comparator)

To overcome the noise sensitivity of the basic comparator, the Schmitt Trigger utilizes Positive Feedback. This introduces Hysteresis, creating two distinct threshold voltages.

Key Concepts

  • UTP (Upper Threshold Point): The input voltage level at which the output switches from High to Low (or Low to High).
  • LTP (Lower Threshold Point): The input voltage level at which the output switches back to its original state.
  • Hysteresis Voltage (): The difference between the two thresholds (). Noise amplitude must exceed to cause false triggering.

Inverting Schmitt Trigger Configuration

  • Input signal applied to the Inverting terminal (-).
  • Positive feedback applied to the Non-Inverting terminal (+) via a voltage divider ( and ).

Formulas:


Operation:

  1. Assume . The voltage at the (+) terminal is .
  2. The output remains until rises above .
  3. Once , the output snaps to .
  4. The reference at the (+) terminal now changes to .
  5. The output remains until drops below .

5. Voltage Limiters (Clippers)

Op-amp circuits designed to prevent the output signal from exceeding specific voltage levels. This is achieved using components (usually Zener diodes) in the feedback loop.

Operation

  • Linear Region: When the output voltage is below the Zener breakdown voltage, the diode acts as an open circuit (or high impedance). The circuit behaves like a standard inverting amplifier.
  • Limiting Region: When the output voltage tries to exceed the Zener voltage (), the diode conducts/breaks down. This reduces the feedback resistance to near zero, clamping the output voltage.

Double-Ended Limiter

Uses two Zener diodes connected back-to-back in the feedback path.

  • Positive Limit: (forward drop of D2).
  • Negative Limit: (forward drop of D1).

6. Voltage-to-Frequency (V/F) and Frequency-to-Voltage (F/V) Converters

Voltage-to-Frequency Converter (VFC)

Also known as a Voltage Controlled Oscillator (VCO).

  • Function: Generates an output frequency () precisely proportional to an input control voltage ().
  • Architecture: Typically involves an integrator and a comparator. As increases, the integrator charges a capacitor faster, causing the comparator to trigger more frequently.
  • Applications: Telemetry (sending analog data over digital lines), A/D conversion in digital multimeters.

Frequency-to-Voltage Converter (FVC)

  • Function: Generates an output voltage () proportional to the input signal frequency ().
  • Architecture: Input pulses trigger a one-shot (monostable) multivibrator to create pulses of constant width and amplitude. These pulses are then averaged by a Low Pass Filter.
  • Applications: Tachometers (motor speed measurement), FM demodulation.

7. Analog to Digital (ADC) and Digital to Analog (DAC) Converters

Digital-to-Analog Converters (DAC)

Converts a binary input word into a discrete analog voltage.

  1. Weighted Resistor DAC:
    • Uses a summing amplifier with binary-weighted input resistors ().
    • Drawback: Requires a wide range of precision resistor values, which is difficult to fabricate in ICs.
  2. R-2R Ladder DAC:
    • Uses only two resistor values ( and ) in a ladder network.
    • Advantage: Easier to manufacture, better precision, standard method for most DACs.

Analog-to-Digital Converters (ADC)

Converts a continuous analog voltage into a digital binary code.

  1. Flash ADC (Parallel Comparator):
    • Uses comparators for n-bit resolution.
    • Pros: Extremely fast.
    • Cons: High component count (e.g., 8-bit requires 255 comparators).
  2. Successive Approximation Register (SAR):
    • Uses a comparator, a DAC, and SAR logic. It uses a "binary search" algorithm to converge on the input voltage.
    • Pros: Good balance of speed and resolution.
  3. Dual Slope Integrating ADC:
    • Integrates for a fixed time, then de-integrates using .
    • Pros: Excellent noise immunity and accuracy.
    • Cons: Slow speed (used in digital voltmeters).

8. Sample and Hold Circuit (S/H)

This circuit takes a sample of the analog input signal at a specific instant and holds that voltage level constant while the ADC performs the conversion.

Circuit Components

  1. Input Buffer: High impedance op-amp (Voltage Follower) to prevent loading the source.
  2. Switch: Usually a FET or MOSFET, controlled by a logic signal.
  3. Holding Capacitor (): Stores the charge.
  4. Output Buffer: High impedance op-amp to prevent the capacitor from discharging into the load.

Operation Modes

  • Sample Mode: Switch is Closed. The capacitor charges to . Output tracks input.
  • Hold Mode: Switch is Open. The capacitor retains the voltage. Output is constant ().

Performance Parameters

  • Aperture Time: Delay between the hold command and the actual switch opening.
  • Droop Rate: The rate at which voltage across the capacitor drops during hold mode due to leakage currents.

9. The 555 Timer

The NE555 is a highly stable controller capable of producing accurate time delays or oscillation.

Internal Architecture

  • Voltage Divider: Three 5k resistors split into and .
  • Comparators:
    • Upper Comparator: Compares Threshold pin to .
    • Lower Comparator: Compares Trigger pin to .
  • SR Flip-Flop: Set/Reset by comparators.
  • Discharge Transistor: An open-collector NPN transistor connected to the Discharge pin (pin 7).

Mode 1: Monostable Multivibrator (One-Shot)

Produces a single output pulse of fixed width when triggered.

  • Trigger: A negative pulse on Pin 2 ().
  • Pulse Width (): Determined by external R and C.
  • Application: Timers, missing pulse detectors, bounce elimination.

Mode 2: Astable Multivibrator (Free-Running)

Produces a continuous square wave output. Requires two resistors () and one capacitor ().

  • Operation: Capacitor charges through and discharges through .
  • Charge Time (High Output):
  • Discharge Time (Low Output):
  • Total Period:
  • Frequency:
  • Duty Cycle: (Always in standard configuration).

10. Reading Datasheet of 555

Understanding the datasheet is crucial for practical design.

Key Specifications (Typical NE555)

  1. Supply Voltage (): Typically to (up to max). CMOS versions (like LMC555) can operate as low as .
  2. Output Current (Source/Sink): Max . This is high enough to drive relays or LEDs directly.
  3. Power Dissipation: typically .
  4. Timing Error:
    • Initial Accuracy: ~1%
    • Temperature Drift: 50 ppm/°C.
  5. Pinout Configuration (8-pin DIP):
    • 1: GND
    • 2: Trigger
    • 3: Output
    • 4: Reset (Active Low)
    • 5: Control Voltage (Used to adjust threshold, typically decoupled with 10nF cap).
    • 6: Threshold
    • 7: Discharge
    • 8:

11. Phase Locked Loops (PLL)

A PLL is a feedback system designed to lock the phase (and consequently the frequency) of an output signal to an input reference signal.

Block Diagram Components

  1. Phase Detector (PD) / Phase Comparator: Compares the phase of the input signal () with the feedback signal from the VCO (). Output is an error voltage proportional to the phase difference.
  2. Low Pass Filter (LPF): Removes high-frequency components from the PD output and produces a DC control voltage. It determines the dynamic characteristics (capture range).
  3. Error Amplifier: Amplifies the DC control voltage.
  4. Voltage Controlled Oscillator (VCO): Generates an output frequency determined by the DC control voltage.

Operation States

  1. Free Running: No input signal. VCO operates at center frequency .
  2. Capture: An input signal is applied. The system attempts to synchronize. The range of frequencies where the PLL can acquire lock is the Capture Range.
  3. Locked: The VCO frequency equals the input frequency (), with a constant phase difference. The range of frequencies where the PLL can maintain lock is the Lock Range (Tracking Range).
    • Note: Lock Range is always greater than or equal to Capture Range.

Applications

  • Frequency Synthesis: Generating precise multiples of a reference frequency.
  • FM Demodulation: Tracking frequency shifts in FM signals to recover audio.
  • FSK Decoders: Decoding Frequency Shift Keying in modems.
  • Motor Speed Control: Precise synchronization of motor speed.